mb/amd/birman: Move EC FW to FMAP

Move EC FW from a CBFS file to an FMAP entry and rename the EC signature
section to EC_SIG.

An offset of (16M - 512K) was chosen to line up the EC FW before the
RW_MRC_CACHE.

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I9b19d92043790b10acd20fbfdf394d5bd67b8295
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70695
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
This commit is contained in:
Fred Reitberger
2022-12-12 10:13:41 -05:00
committed by Lean Sheng Tan
parent 36ca7b3104
commit 75e720bf02
6 changed files with 11 additions and 21 deletions

View File

@@ -51,17 +51,7 @@ config BIRMAN_MCHP_FW_FILE
depends on BIRMAN_HAVE_MCHP_FW depends on BIRMAN_HAVE_MCHP_FW
default "3rdparty/blobs/mainboard/amd/birman/EC_birman.bin" default "3rdparty/blobs/mainboard/amd/birman/EC_birman.bin"
help help
The EC firmware blob is at the BIRMAN_MCHP_FW_OFFSET offset of the The EC firmware blob is at the EC_BODY FMAP region of the firmware image.
firmware image.
config BIRMAN_MCHP_FW_OFFSET
hex
depends on BIRMAN_HAVE_MCHP_FW
default 0xF00000
help
The EC firmware blob defaults to the 4MByte offset of the firmware
image. If this offset needs to change, a new signature block must be
generated with the updated offset.
config VBOOT config VBOOT
select VBOOT_NO_BOARD_SUPPORT select VBOOT_NO_BOARD_SUPPORT

View File

@@ -19,12 +19,8 @@ endif
ifeq ($(CONFIG_BIRMAN_HAVE_MCHP_FW),y) ifeq ($(CONFIG_BIRMAN_HAVE_MCHP_FW),y)
$(call add_intermediate, add_mchp_fw) $(call add_intermediate, add_mchp_fw)
$(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_BIRMAN_MCHP_SIG_FILE) --fill-upward $(CBFSTOOL) $(obj)/coreboot.pre write -r EC_SIG -f $(CONFIG_BIRMAN_MCHP_SIG_FILE) --fill-upward
$(CBFSTOOL) $(obj)/coreboot.pre write -r EC_BODY -f $(CONFIG_BIRMAN_MCHP_FW_FILE) --fill-upward
cbfs-files-y += apu/ecfw
apu/ecfw-file := $(CONFIG_BIRMAN_MCHP_FW_FILE)
apu/ecfw-position := $(CONFIG_BIRMAN_MCHP_FW_OFFSET)
apu/ecfw-type := raw
else else
files_added:: warn_no_mchp files_added:: warn_no_mchp

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@@ -1,8 +1,9 @@
FLASH@0xFF000000 16M { FLASH@0xFF000000 16M {
BIOS { BIOS {
EC 4K EC_SIG 4K
FMAP 4K FMAP 4K
COREBOOT(CBFS) COREBOOT(CBFS)
EC_BODY@15872K 256K
RW_MRC_CACHE 120K RW_MRC_CACHE 120K
} }
} }

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@@ -1,8 +1,9 @@
FLASH@0xFF000000 16M { FLASH@0xFF000000 16M {
BIOS { BIOS {
EC 4K EC_SIG 4K
FMAP 4K FMAP 4K
COREBOOT(CBFS) COREBOOT(CBFS)
EC_BODY@15872K 256K
RW_MRC_CACHE 256K RW_MRC_CACHE 256K
} }
} }

View File

@@ -1,7 +1,7 @@
FLASH@0xFF000000 16M { FLASH@0xFF000000 16M {
SI_BIOS { SI_BIOS {
WP_RO 8M { WP_RO 8M {
EC 4K EC_SIG 4K
RO_VPD(PRESERVE) 16K RO_VPD(PRESERVE) 16K
RO_SECTION { RO_SECTION {
FMAP 2K FMAP 2K
@@ -29,6 +29,7 @@ FLASH@0xFF000000 16M {
RW_NVRAM(PRESERVE) 20K RW_NVRAM(PRESERVE) 20K
SMMSTORE(PRESERVE) 64K SMMSTORE(PRESERVE) 64K
RW_LEGACY(CBFS) RW_LEGACY(CBFS)
EC_BODY@15872K 256K
RW_MRC_CACHE(PRESERVE) 120K RW_MRC_CACHE(PRESERVE) 120K
} }
} }

View File

@@ -1,7 +1,7 @@
FLASH@0xFF000000 16M { FLASH@0xFF000000 16M {
SI_BIOS { SI_BIOS {
WP_RO 8M { WP_RO 8M {
EC 4K EC_SIG 4K
RO_VPD(PRESERVE) 16K RO_VPD(PRESERVE) 16K
RO_SECTION { RO_SECTION {
FMAP 2K FMAP 2K
@@ -29,6 +29,7 @@ FLASH@0xFF000000 16M {
RW_NVRAM(PRESERVE) 20K RW_NVRAM(PRESERVE) 20K
SMMSTORE(PRESERVE) 64K SMMSTORE(PRESERVE) 64K
RW_LEGACY(CBFS) RW_LEGACY(CBFS)
EC_BODY@15872K 256K
RW_MRC_CACHE(PRESERVE) 256K RW_MRC_CACHE(PRESERVE) 256K
} }
} }