drivers/intel/gma: Hook up libgfxinit in romstage

A mainboard port needs to:

- select `CONFIG_MAINBOARD_HAS_EARLY_LIBGFXINIT'

- implement the Ada package `GMA.Mainboard' with a single function
  `ports' that returns a list of ports to be probed for displays.

- set the desired `GFX_GMA_DEFAULT_MMIO' IO memory address to use
  in romstage (and ramstage) for the graphic device.

BUG=b:252792591
BRANCH=firmware-brya-14505.B
TEST=libgfxinit compiles in romstage.
     libgfxinit successfully executes in romstage and ramstage using
     the requested MMIO setting on skolas.

Change-Id: I3c2101de10dc5df54fe873e43bbe0f1c4dccff44
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70276
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/common/block/graphics/graphics.c

@@ -173,6 +173,18 @@ static void graphics_dev_read_resources(struct device *dev)
 		if (res_bar0->flags & IORESOURCE_PREFETCH)
 			res_bar0->flags &= ~IORESOURCE_PREFETCH;
 	}
+
+	/*
+	 * If libhwbase static MMIO driver is used, IGD BAR 0 has to be set to
+	 * CONFIG_GFX_GMA_DEFAULT_MMIO for the libgfxinit to operate properly.
+	 */
+	if (CONFIG(MAINBOARD_USE_LIBGFXINIT) && CONFIG(HWBASE_STATIC_MMIO)) {
+		struct resource *res_bar0 = find_resource(dev, PCI_BASE_ADDRESS_0);
+		res_bar0->base = CONFIG_GFX_GMA_DEFAULT_MMIO;
+		res_bar0->flags |= IORESOURCE_ASSIGNED;
+		pci_dev_set_resources(dev);
+		res_bar0->flags |= IORESOURCE_FIXED;
+	}
 }
 
 const struct device_operations graphics_ops = {