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soc/intel/alderlake: add processor power limits control support

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Add processor power limits control support to configure values for
alderlake soc based platforms.

BRANCH=None
BUG=None
TEST=Build and test on alderlake rvp board

Change-Id: I9dc37c7a43e6bd6f1ff5e8a97e22a0c7ac421802
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51397
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Sumeet R Pawnikar
2021-03-10 21:09:37 +05:30
committed by Patrick Georgi
parent 8bd525001f
commit 77298c6820
3 changed files with 17 additions and 1 deletions
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src/soc/intel/alderlake/Kconfig
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@@ -59,6 +59,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_HDA
select SOC_INTEL_COMMON_BLOCK_IPU
select SOC_INTEL_COMMON_BLOCK_MEMINIT
select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
select SOC_INTEL_COMMON_BLOCK_SA
select SOC_INTEL_COMMON_BLOCK_SMM
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP