From 772ca3cc005125a2cbe0731493929041e61c20cb Mon Sep 17 00:00:00 2001 From: Raihow Shi Date: Mon, 27 Jun 2022 13:20:47 +0800 Subject: [PATCH] =?UTF-8?q?mb/google/brask/variants/moli:=20set=20tcc=5Fof?= =?UTF-8?q?fset=20to=200=E2=84=83?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Set tcc_offset value to 0 in devicetree for Thermal Control Circuit (TCC) activation feature. This value is suggested by Thermal team. BUG=b:236294162 TEST=emerge-brask coreboot Signed-off-by: Raihow Shi Change-Id: I8d4c631e07873923226683c8aa0cf36cb872e2d4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65448 Tested-by: build bot (Jenkins) Reviewed-by: Sumeet R Pawnikar --- src/mainboard/google/brya/variants/moli/overridetree.cb | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb index ccfb478f01..6aa1ddc02f 100644 --- a/src/mainboard/google/brya/variants/moli/overridetree.cb +++ b/src/mainboard/google/brya/variants/moli/overridetree.cb @@ -27,6 +27,7 @@ chip soc/intel/alderlake register "usb2_ports[3]" = "USB2_PORT_SHORT(OC_SKIP)" # Enable USB2 Port4 register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Disable USB2 Port9 register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable TCP3 + register "tcc_offset" = "0" # TCC of 100C device domain 0 on device ref tcss_dma0 on chip drivers/intel/usb4/retimer