sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/intel/sgx: convert SGX and PRMRR devicetree options to Kconfig

Browse Source 
The devicetree is not made for user-choosable options, thus introduce
Kconfig options for both SGX and the corresponding PRMRR size.

The PRMRR size Kconfig has been implemented as a maximum value. At
runtime the final PRMRR size gets selected by checking the supported
values in MSR_PRMRR_VALID_CONFIG and trying to select the value nearest
to the chosen one.

When "Maximum" is chosen, the highest possibly value from the MSR gets
used. When a too strict limit is set, coreboot will die, printing an
error message.

Tested successfully on X11SSM-F

Change-Id: I5f08e85898304bba6680075ca5d6bce26aef9a4d
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35799
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Michael Niewöhner
2019-10-22 23:05:06 +02:00
committed by Nico Huber
parent e75a64f822
commit 7736bfc443
25 changed files with 130 additions and 82 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
src/soc/intel/skylake/chip.h
View File

@@ -510,14 +510,6 @@ struct soc_intel_skylake_config {
*/
u8 SendVrMbxCmd;
/*
* PRMRR size setting with three options
* 0x02000000 - 32MiB
* 0x04000000 - 64MiB
* 0x08000000 - 128MiB
*/
u32 PrmrrSize;
/* Enable/Disable host reads to PMC XRAM registers */
u8 PchPmPmcReadDisable;
@@ -576,9 +568,6 @@ struct soc_intel_skylake_config {
u8 SlowSlewRateForGt;
u8 SlowSlewRateForSa;
/* Enable SGX feature */
u8 sgx_enable;
/* Enable/Disable EIST
* 1b - Enabled
* 0b - Disabled