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arch/x86/*.S: use defines instead of hardcoded values

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As preparation for x86_64 clean the assembly code and introduce
arch/ram_segs.h similar to existing arch/rom_segs.h.

Replace open coded segment values with the defines from the new
header.

Change-Id: Ib006cd4df59951335506b8153e9347450ec3403e
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36321
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Rudolph
2019-10-25 08:09:33 +02:00
committed by Aaron Durbin
parent 5f2576089f
commit 776da0872e
5 changed files with 50 additions and 24 deletions
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7
src/cpu/x86/lapic/secondary.S
View File

@@ -13,6 +13,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/lapic_def.h>
#include <arch/ram_segs.h>
.text
.globl _secondary_start, _secondary_start_end, _secondary_gdt_addr
@@ -38,7 +39,7 @@ _secondary_start:
orl $0x60000001, %eax /* CD, NW, PE = 1 */
movl %eax, %cr0
ljmpl $0x10, $__ap_protected_start
ljmpl $RAM_CODE_SEG, $__ap_protected_start
/* This will get filled in by C code. */
_secondary_gdt_addr:
@@ -51,11 +52,11 @@ _secondary_start_end:
ap_protected_start:
.code32
lgdt gdtaddr
ljmpl $0x10, $__ap_protected_start
ljmpl $RAM_CODE_SEG, $__ap_protected_start
__ap_protected_start:
movw $0x18, %ax
movw $RAM_DATA_SEG, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss

9
src/cpu/x86/sipi_vector.S
View File

@@ -15,15 +15,12 @@
#include <cpu/x86/cr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/x86/msr.h>
#include <arch/ram_segs.h>
/* The SIPI vector is responsible for initializing the APs in the system. It
* loads microcode, sets up MSRs, and enables caching before calling into
* C code. */
/* These segment selectors need to match the gdt entries in c_start.S. */
#define CODE_SEG 0x10
#define DATA_SEG 0x18
.section ".module_parameters", "aw", @progbits
ap_start_params:
gdtaddr:
@@ -83,10 +80,10 @@ _start:
orl $CR0_SET_FLAGS, %eax
movl %eax, %cr0
ljmpl $CODE_SEG, $1f
ljmpl $RAM_CODE_SEG, $1f
1:
.code32
movw $DATA_SEG, %ax
movw $RAM_DATA_SEG, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss