sb/intel/ibexpeak: Align to coreboot's coding style

Tested with BUILD_TIMELESS=1, Packard Bell MS2290 remains identical.

Change-Id: I30512ef7ff7eb091e1f880c43a0a9ecf8625a710
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46530
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons
2020-10-17 18:39:04 +02:00
committed by Patrick Georgi
parent e26e9b556d
commit 77f340a707
7 changed files with 92 additions and 92 deletions

View File

@@ -102,7 +102,7 @@ void southbridge_smi_monitor(void)
RCBA32(0x1e00) = trap_sts; // Clear trap(s) in TRSR
trap_cycle = RCBA32(0x1e10);
for (i=16; i<20; i++) {
for (i = 16; i < 20; i++) {
if (trap_cycle & (1 << i))
mask |= (0xff << ((i - 16) << 2));
}
@@ -131,7 +131,10 @@ void southbridge_smi_monitor(void)
}
printk(BIOS_DEBUG, " trapped io address = 0x%x\n", trap_cycle & 0xfffc);
for (i=0; i < 4; i++) if (IOTRAP(i)) printk(BIOS_DEBUG, " TRAP = %d\n", i);
for (i = 0; i < 4; i++) {
if (IOTRAP(i))
printk(BIOS_DEBUG, " TRAP = %d\n", i);
}
printk(BIOS_DEBUG, " AHBE = %x\n", (trap_cycle >> 16) & 0xf);
printk(BIOS_DEBUG, " MASK = 0x%08x\n", mask);
printk(BIOS_DEBUG, " read/write: %s\n", (trap_cycle & (1 << 24)) ? "read" : "write");