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UART 8250: Unconditionally provide register constants and use UART8250 prefix.

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The register indexes and bitfield masks were guarded by the UART8250 config
options, but it might be (is) necessary to use them in a driver that is
UART8250 like without actually using the 8250 driver itself. To avoid any name
collision with other drivers, also change the constant prefix from UART_ to
UART8250_.

Change-Id: Ie606d9e0329132961c3004688176204a829569dc
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/171336
Reviewed-by: Ronald Minnich <rminnich@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit a93900be8d8a8260db49e30737608f9161fbf249)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6715
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
This commit is contained in:
Gabe Black
2013-09-30 21:25:49 -07:00
committed by Isaac Christensen
parent 3905e3d47c
commit 77ffa0d3ad
5 changed files with 102 additions and 102 deletions
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24
src/drivers/uart/uart8250mem.c
View File

@ -35,7 +35,7 @@
static int uart8250_mem_can_tx_byte(unsigned base_port)
{
return read8(base_port + UART_LSR) & UART_LSR_THRE;
return read8(base_port + UART8250_LSR) & UART8250_LSR_THRE;
}
static void uart8250_mem_tx_byte(unsigned base_port, unsigned char data)
@ -43,19 +43,19 @@ static void uart8250_mem_tx_byte(unsigned base_port, unsigned char data)
unsigned long int i = SINGLE_CHAR_TIMEOUT;
while(i-- && !uart8250_mem_can_tx_byte(base_port))
udelay(1);
write8(base_port + UART_TBR, data);
write8(base_port + UART8250_TBR, data);
}
static void uart8250_mem_tx_flush(unsigned base_port)
{
unsigned long int i = FIFO_TIMEOUT;
while(i-- && !(read8(base_port + UART_LSR) & UART_LSR_TEMT))
while(i-- && !(read8(base_port + UART8250_LSR) & UART8250_LSR_TEMT))
udelay(1);
}
static int uart8250_mem_can_rx_byte(unsigned base_port)
{
return read8(base_port + UART_LSR) & UART_LSR_DR;
return read8(base_port + UART8250_LSR) & UART8250_LSR_DR;
}
static unsigned char uart8250_mem_rx_byte(unsigned base_port)
@ -64,7 +64,7 @@ static unsigned char uart8250_mem_rx_byte(unsigned base_port)
while(i-- && !uart8250_mem_can_rx_byte(base_port))
udelay(1);
if (i)
return read8(base_port + UART_RBR);
return read8(base_port + UART8250_RBR);
else
return 0x0;
}
@ -72,21 +72,21 @@ static unsigned char uart8250_mem_rx_byte(unsigned base_port)
static void uart8250_mem_init(unsigned base_port, unsigned divisor)
{
/* Disable interrupts */
write8(base_port + UART_IER, 0x0);
write8(base_port + UART8250_IER, 0x0);
/* Enable FIFOs */
write8(base_port + UART_FCR, UART_FCR_FIFO_EN);
write8(base_port + UART8250_FCR, UART8250_FCR_FIFO_EN);
/* Assert DTR and RTS so the other end is happy */
write8(base_port + UART_MCR, UART_MCR_DTR | UART_MCR_RTS);
write8(base_port + UART8250_MCR, UART8250_MCR_DTR | UART8250_MCR_RTS);
/* DLAB on */
write8(base_port + UART_LCR, UART_LCR_DLAB | CONFIG_TTYS0_LCS);
write8(base_port + UART8250_LCR, UART8250_LCR_DLAB | CONFIG_TTYS0_LCS);
write8(base_port + UART_DLL, divisor & 0xFF);
write8(base_port + UART_DLM, (divisor >> 8) & 0xFF);
write8(base_port + UART8250_DLL, divisor & 0xFF);
write8(base_port + UART8250_DLM, (divisor >> 8) & 0xFF);
/* Set to 3 for 8N1 */
write8(base_port + UART_LCR, CONFIG_TTYS0_LCS);
write8(base_port + UART8250_LCR, CONFIG_TTYS0_LCS);
}
void uart_init(int idx)