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soc/intel/common/block/cse: Prevent HECI commands when flash descriptor override is set

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Sending the disable and EOP commands will not work if flash descriptor
override is set on Meteor Lake.

Change-Id: I3b5a56229434c9cc326141d48359faa7759541ee
Signed-off-by: Jeremy Soller <Jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
This commit is contained in:
Jeremy Soller 2024-03-21 12:38:52 -06:00 committed by Tim Crawford
parent 27ca018b94
commit 783b4bfc52
No known key found for this signature in database
GPG Key ID: 68E558D2BBD856E3
4 changed files with 27 additions and 2 deletions
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12
src/soc/intel/common/block/cse/cse.c
View File

@ -11,6 +11,7 @@
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <device/pci_ops.h> #include <device/pci_ops.h>
#include <intelblocks/cse.h> #include <intelblocks/cse.h>
#include <intelblocks/fast_spi.h>
#include <intelblocks/me.h> #include <intelblocks/me.h>
#include <intelblocks/pmclib.h> #include <intelblocks/pmclib.h>
#include <intelblocks/post_codes.h> #include <intelblocks/post_codes.h>
@ -1311,10 +1312,17 @@ static void cse_set_state(struct device *dev)
size_t enable_reply_size; size_t enable_reply_size;
/* Function Start */
int send; int send;
int result; int result;
/* Function Start */
if (fast_spi_flash_descriptor_override()) {
printk(BIOS_WARNING, "HECI: not setting ME state because "
"flash descriptor override is enabled\n");
return;
}
/* /*
* Check if the CMOS value "me_state" exists, if it doesn't, then * Check if the CMOS value "me_state" exists, if it doesn't, then
* don't do anything. * don't do anything.

6
src/soc/intel/common/block/cse/cse_eop.c
View File

@ -4,6 +4,7 @@
#include <bootstate.h> #include <bootstate.h>
#include <console/console.h> #include <console/console.h>
#include <intelblocks/cse.h> #include <intelblocks/cse.h>
#include <intelblocks/fast_spi.h>
#include <intelblocks/pmc_ipc.h> #include <intelblocks/pmc_ipc.h>
#include <security/vboot/vboot_common.h> #include <security/vboot/vboot_common.h>
#include <soc/intel/common/reset.h> #include <soc/intel/common/reset.h>
@ -243,6 +244,11 @@ static void do_send_end_of_post(bool wait_for_completion)
return; return;
} }
if (fast_spi_flash_descriptor_override()) {
printk(BIOS_WARNING, "CSE: not sending EOP because flash descriptor override is enabled\n");
return;
}
if (!eop_sent) { if (!eop_sent) {
set_cse_device_state(PCH_DEVFN_CSE, DEV_ACTIVE); set_cse_device_state(PCH_DEVFN_CSE, DEV_ACTIVE);
timestamp_add_now(TS_ME_END_OF_POST_START); timestamp_add_now(TS_ME_END_OF_POST_START);

9
src/soc/intel/common/block/fast_spi/fast_spi.c
View File

@ -483,6 +483,15 @@ void fast_spi_clear_outstanding_status(void)
write32(spibar + SPIBAR_HSFSTS_CTL, SPIBAR_HSFSTS_W1C_BITS); write32(spibar + SPIBAR_HSFSTS_CTL, SPIBAR_HSFSTS_W1C_BITS);
} }
/* Check if flash descriptor override is asserted */
bool fast_spi_flash_descriptor_override(void)
{
void *spibar = fast_spi_get_bar();
uint32_t hsfsts = read32(spibar + SPIBAR_HSFSTS_CTL);
printk(BIOS_DEBUG, "HSFSTS: 0x%X\n", hsfsts);
return !(hsfsts & SPIBAR_HSFSTS_FDOPSS);
}
/* As there is no official ACPI ID for this controller use the generic PNP ID for now. */ /* As there is no official ACPI ID for this controller use the generic PNP ID for now. */
static const char *fast_spi_acpi_hid(const struct device *dev) static const char *fast_spi_acpi_hid(const struct device *dev)

2
src/soc/intel/common/block/include/intelblocks/fast_spi.h
View File

@ -111,5 +111,7 @@ void fast_spi_set_bde(void);
* Set FAST_SPIBAR Vendor Component Lock bit. * Set FAST_SPIBAR Vendor Component Lock bit.
*/ */
void fast_spi_set_vcl(void); void fast_spi_set_vcl(void);
/* Check if flash descriptor override is asserted */
bool fast_spi_flash_descriptor_override(void);
#endif /* SOC_INTEL_COMMON_BLOCK_FAST_SPI_H */ #endif /* SOC_INTEL_COMMON_BLOCK_FAST_SPI_H */