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Remove XIP_ROM_BASE

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The base is now calculated automatically, and all mentions of that
config option were typical anyway (4GB - XIP_ROM_SIZE).

Change-Id: Icdf908dc043719f3810f7b5b85ad9938f362ea40
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/366
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Patrick Georgi
2011-10-31 17:07:52 +01:00
committed by Stefan Reinauer
parent 36c04e8a5c
commit 784544b934
17 changed files with 12 additions and 70 deletions
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4
src/cpu/intel/model_106cx/cache_as_ram.inc
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@@ -98,7 +98,7 @@ clear_mtrrs:
orl $(1 << 30), %eax
movl %eax, %cr0
#if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE)
#if CONFIG_XIP_ROM_SIZE
/* Enable cache for our code in Flash because we do XIP here */
movl $MTRRphysBase_MSR(1), %ecx
xorl %edx, %edx
@@ -115,7 +115,7 @@ clear_mtrrs:
xorl %edx, %edx
movl $(~(CONFIG_XIP_ROM_SIZE - 1) | 0x800), %eax
wrmsr
#endif /* CONFIG_XIP_ROM_SIZE && CONFIG_XIP_ROM_BASE */
#endif /* CONFIG_XIP_ROM_SIZE */
/* Enable cache. */
movl %cr0, %eax