soc/intel/apollolake: Change PCI macros to match Skylake
Change PCI macros in such a way they can be transparently used across romstage and ramstage. Change-Id: Idc708c1990f2fc1d941bb82efcb0a697524f2eca Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/15483 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
committed by
Duncan Laurie
parent
9d8b2ffb49
commit
78461a9d55
@@ -134,49 +134,49 @@ static void disable_dev(struct device *dev, struct FSP_S_CONFIG *silconfig) {
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case XDCI_DEVFN:
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silconfig->UsbOtg = 0;
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break;
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case I2C0_DEVFN:
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case LPSS_DEVFN_I2C0:
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silconfig->I2c0Enable = 0;
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break;
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case I2C1_DEVFN:
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case LPSS_DEVFN_I2C1:
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silconfig->I2c1Enable = 0;
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break;
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case I2C2_DEVFN:
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case LPSS_DEVFN_I2C2:
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silconfig->I2c2Enable = 0;
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break;
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case I2C3_DEVFN:
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case LPSS_DEVFN_I2C3:
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silconfig->I2c3Enable = 0;
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break;
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case I2C4_DEVFN:
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case LPSS_DEVFN_I2C4:
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silconfig->I2c4Enable = 0;
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break;
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case I2C5_DEVFN:
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case LPSS_DEVFN_I2C5:
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silconfig->I2c5Enable = 0;
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break;
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case I2C6_DEVFN:
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case LPSS_DEVFN_I2C6:
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silconfig->I2c6Enable = 0;
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break;
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case I2C7_DEVFN:
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case LPSS_DEVFN_I2C7:
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silconfig->I2c7Enable = 0;
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break;
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case UART0_DEVFN:
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case LPSS_DEVFN_UART0:
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silconfig->Hsuart0Enable = 0;
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break;
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case UART1_DEVFN:
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case LPSS_DEVFN_UART1:
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silconfig->Hsuart1Enable = 0;
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break;
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case UART2_DEVFN:
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case LPSS_DEVFN_UART2:
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silconfig->Hsuart2Enable = 0;
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break;
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case UART3_DEVFN:
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case LPSS_DEVFN_UART3:
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silconfig->Hsuart3Enable = 0;
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break;
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case SPI0_DEVFN:
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case LPSS_DEVFN_SPI0:
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silconfig->Spi0Enable = 0;
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break;
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case SPI1_DEVFN:
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case LPSS_DEVFN_SPI1:
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silconfig->Spi1Enable = 0;
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break;
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case SPI2_DEVFN:
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case LPSS_DEVFN_SPI2:
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silconfig->Spi2Enable = 0;
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break;
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case SDCARD_DEVFN:
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@@ -201,7 +201,7 @@ static void disable_dev(struct device *dev, struct FSP_S_CONFIG *silconfig) {
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static void parse_devicetree(struct FSP_S_CONFIG *silconfig)
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{
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struct device *dev = dev_find_slot(0, NB_DEVFN);
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struct device *dev = NB_DEV_ROOT;
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if (!dev) {
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printk(BIOS_ERR, "Could not find root device\n");
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@@ -222,7 +222,8 @@ void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *silupd)
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/* Load VBT before devicetree-specific config. */
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silconfig->GraphicsConfigPtr = (uintptr_t)vbt;
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struct device *dev = dev_find_slot(NB_BUS, NB_DEVFN);
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struct device *dev = NB_DEV_ROOT;
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if (!dev || !dev->chip_info) {
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printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n");
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return;
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