arch/x86/acpi: Add DMAR RMRR helper functions
Add DMAR RMRR table entry and helper functions, using the existing DRHD functions as a model. As the DRHD device scope (DS) functions aren't DRHD-specific, genericize them to be used with RMRR tables as well. Correct DRHD bar size to match table entry in creator function, as noted in comments from patchset below. Adapted from/supersedes https://review.coreboot.org/25445 Change-Id: I912b1d7244ca4dd911bb6629533d453b1b4a06be Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/27269 Reviewed-by: Youness Alaoui <snifikino@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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committed by
Nico Huber
parent
a6b3b4dd8f
commit
7866d497ad
@@ -586,7 +586,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
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const unsigned long tmp = current;
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current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
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current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 0);
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current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
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acpi_dmar_drhd_fixup(tmp, current);
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}
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@@ -596,11 +596,11 @@ static unsigned long acpi_fill_dmar(unsigned long current)
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const unsigned long tmp = current;
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current += acpi_create_dmar_drhd(current,
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DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
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current += acpi_create_dmar_drhd_ds_ioapic(current,
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current += acpi_create_dmar_ds_ioapic(current,
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2, PCH_IOAPIC_PCI_BUS, PCH_IOAPIC_PCI_SLOT, 0);
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size_t i;
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for (i = 0; i < 8; ++i)
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current += acpi_create_dmar_drhd_ds_msi_hpet(current,
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current += acpi_create_dmar_ds_msi_hpet(current,
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0, PCH_HPET_PCI_BUS,
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PCH_HPET_PCI_SLOT, i);
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acpi_dmar_drhd_fixup(tmp, current);
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@@ -331,12 +331,12 @@ static unsigned long acpi_fill_dmar(unsigned long current)
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current += acpi_create_dmar_drhd(current,
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DRHD_INCLUDE_PCI_ALL, 0, vtbar);
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/* The IIO I/O APIC is fixed on PCI 00:05.4 on Broadwell-DE */
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current += acpi_create_dmar_drhd_ds_ioapic(current,
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current += acpi_create_dmar_ds_ioapic(current,
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9, 0, 5, 4);
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/* Get the PCI BDF for the PCH I/O APIC */
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dev = dev_find_slot(0, LPC_DEV_FUNC);
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bdf = pci_read_config16(dev, 0x6c);
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current += acpi_create_dmar_drhd_ds_ioapic(current,
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current += acpi_create_dmar_ds_ioapic(current,
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8, (bdf >> 8), PCI_SLOT(bdf), PCI_FUNC(bdf));
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/*
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@@ -365,7 +365,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
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/* Create one HPET entry in DMAR for every unique HPET PCI path. */
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for (i = 0; i < ARRAY_SIZE(hpet_bdf); i++) {
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if (hpet_bdf[i])
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current += acpi_create_dmar_drhd_ds_msi_hpet(current,
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current += acpi_create_dmar_ds_msi_hpet(current,
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0, (hpet_bdf[i] >> 8), PCI_SLOT(hpet_bdf[i]),
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PCI_FUNC(hpet_bdf[i]));
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}
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@@ -380,7 +380,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
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dev = dev_find_class(PCI_CLASS_BRIDGE_PCI << 8, dev);
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if (dev && dev->bus->secondary == 0 &&
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PCI_SLOT(dev->path.pci.devfn) <= 3)
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current += acpi_create_dmar_drhd_ds_pci_br(current,
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current += acpi_create_dmar_ds_pci_br(current,
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dev->bus->secondary,
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PCI_SLOT(dev->path.pci.devfn),
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PCI_FUNC(dev->path.pci.devfn));
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@@ -557,7 +557,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
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const unsigned long tmp = current;
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current += acpi_create_dmar_drhd(current, 0, 0, gfx_vtbar);
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current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 0);
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current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
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acpi_dmar_drhd_fixup(tmp, current);
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}
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@@ -582,9 +582,9 @@ static unsigned long acpi_fill_dmar(unsigned long current)
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current += acpi_create_dmar_drhd(current,
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DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
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current += acpi_create_dmar_drhd_ds_ioapic(current,
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current += acpi_create_dmar_ds_ioapic(current,
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2, ibdf >> 8, PCI_SLOT(ibdf), PCI_FUNC(ibdf));
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current += acpi_create_dmar_drhd_ds_msi_hpet(current,
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current += acpi_create_dmar_ds_msi_hpet(current,
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0, hbdf >> 8, PCI_SLOT(hbdf), PCI_FUNC(hbdf));
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acpi_dmar_drhd_fixup(tmp, current);
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