From 789adfabb722cec627d29c6320c996de44169f86 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Fri, 3 Jun 2022 17:54:56 +0200 Subject: [PATCH] soc/amd/noncar/memlayout.ld: Warn about incorrect reset vector The x86 core always starts with an IP at 0xfff0. This needs to match in the code. Change-Id: Ibced50e4348a2b46511328f9b3f3afa836feb9a5 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/64951 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld index 090d8b727f..9eb9d21ce6 100644 --- a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld +++ b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld @@ -147,6 +147,7 @@ SECTIONS { . = BOOTBLOCK_END - 0x10; _X86_RESET_VECTOR = .; + _bogus = ASSERT((_X86_RESET_VECTOR & 0xffff) == 0xfff0, "IP needs to be 0xfff0"); .reset . : { *(.reset); . = 15;