Remove remaining uses of
HAVE_FAILOVER_BOOT HAVE_FALLBACK_BOOT USE_FAILOVER_IMAGE USE_FALLBACK_IMAGE Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@@ -71,9 +71,6 @@ cache_as_ram_setup:
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cvtsi2sd %eax, %xmm2
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cvtsd2si %xmm3, %ebx
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/* hope we can skip the double set for normal part */
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#if ((CONFIG_HAVE_FAILOVER_BOOT == 1) && (CONFIG_USE_FAILOVER_IMAGE == 1)) || ((CONFIG_HAVE_FAILOVER_BOOT == 0) && (CONFIG_USE_FALLBACK_IMAGE == 1))
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/* check if cpu_init_detected */
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movl $MTRRdefType_MSR, %ecx
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rdmsr
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@@ -248,15 +245,6 @@ clear_fixed_var_mtrr_out:
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xorl %edx, %edx
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movl $(((CONFIG_RAMTOP) + TOP_MEM_MASK) & ~TOP_MEM_MASK) , %eax
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wrmsr
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#endif /* CONFIG_USE_FAILOVER_IMAGE == 1*/
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#if ((CONFIG_HAVE_FAILOVER_BOOT == 1) && (CONFIG_USE_FAILOVER_IMAGE == 0)) || ((CONFIG_HAVE_FAILOVER_BOOT == 0) && (CONFIG_USE_FALLBACK_IMAGE == 0))
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/* disable cache */
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movl %cr0, %eax
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orl $(0x1 << 30), %eax
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movl %eax, %cr0
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#endif
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#if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE)
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/* enable write base caching so we can do execute in place
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@@ -283,7 +271,6 @@ wbcache_post_fam10_setup:
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wrmsr
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#endif /* CONFIG_XIP_ROM_SIZE && CONFIG_XIP_ROM_BASE */
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#if ((CONFIG_HAVE_FAILOVER_BOOT == 1) && (CONFIG_USE_FAILOVER_IMAGE == 1)) || ((CONFIG_HAVE_FAILOVER_BOOT == 0) && (CONFIG_USE_FALLBACK_IMAGE == 1))
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/* Set the default memory type and enable fixed and variable MTRRs */
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movl $MTRRdefType_MSR, %ecx
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xorl %edx, %edx
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@@ -296,7 +283,6 @@ wbcache_post_fam10_setup:
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rdmsr
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orl $(SYSCFG_MSR_MtrrVarDramEn | SYSCFG_MSR_MtrrFixDramEn), %eax
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wrmsr
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#endif
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movb $0xA1, %al
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outb %al, $0x80
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@@ -318,7 +304,6 @@ fam10_end_part1:
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movb $0xA2, %al
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outb %al, $0x80
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#if ((CONFIG_HAVE_FAILOVER_BOOT == 1) && (CONFIG_USE_FAILOVER_IMAGE == 1)) || ((CONFIG_HAVE_FAILOVER_BOOT == 0) && (CONFIG_USE_FALLBACK_IMAGE == 1))
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/* Read the range with lodsl*/
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cld
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movl $CacheBase, %esi
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@@ -331,8 +316,6 @@ fam10_end_part1:
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xorl %eax, %eax
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rep stosl
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#endif /*CONFIG_USE_FAILOVER_IMAGE == 1*/
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/* set up the stack pointer */
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movl $(CacheBase + CacheSize - GlobalVarSize), %eax
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movl %eax, %esp
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