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mainboard/qemu-aarch64: Set CONFIG_PCI_IOBASE to 0x3eff0000

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Define the PCI I/O base address necessary to use port I/O functions on
the qemu-aarch64 mainboard, so that we can get the VGA display devices
working. The config value is from hw/arm/virt.c [1]:

  [VIRT_PCIE_PIO] =           { 0x3eff0000, 0x00010000 },

[1] https://gitlab.com/qemu-project/qemu/-/blob/v8.2.3/hw/arm/virt.c#L164

Change-Id: I85439ba68740d64f789983b37d9c95f849ce4f72
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82059
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Alper Nebi Yasak
2024-04-24 22:24:51 +03:00
committed by Felix Held
parent 7ac0f5b969
commit 795994e025
1 changed files with 3 additions and 0 deletions
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3
src/mainboard/emulation/qemu-aarch64/Kconfig
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@@ -29,6 +29,9 @@ config ECAM_MMCONF_BASE_ADDRESS
config ECAM_MMCONF_BUS_NUMBER
default 256
config PCI_IOBASE
default 0x3eff0000
config MEMLAYOUT_LD_FILE
string
default "src/mainboard/emulation/qemu-aarch64/memlayout.ld"