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soc/amd/picasso: Remove SD controller

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Change-Id: Ie9cf361ed0caba9c73727453c4a503557edc854d
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33988
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Marshall Dawson
2019-07-01 10:53:40 -05:00
committed by Martin Roth
parent fa4a74b098
commit 7997f1ff88
6 changed files with 3 additions and 64 deletions
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4
src/soc/amd/picasso/southbridge.c
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@@ -578,7 +578,7 @@ void southbridge_init(void *chip_info)
static void set_sb_final_nvs(void)
{
const struct device *sd, *sata;
const struct device *sata;
struct global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
if (gnvs == NULL)
@@ -591,8 +591,6 @@ static void set_sb_final_nvs(void)
gnvs->aoac.ut0e = is_aoac_device_enabled(FCH_AOAC_D3_STATE_UART0);
gnvs->aoac.ut1e = is_aoac_device_enabled(FCH_AOAC_D3_STATE_UART1);
/* Rely on these being in sync with devicetree */
sd = pcidev_path_on_root(SD_DEVFN);
gnvs->aoac.sd_e = sd && sd->enabled ? 1 : 0;
sata = pcidev_path_on_root(SATA_DEVFN);
gnvs->aoac.st_e = sata && sata->enabled ? 1 : 0;
gnvs->aoac.espi = 1;