sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/asus/p5qpl-am/devicetree.cb: Do minor cosmetic fixes

Browse Source 
Use lowercase for hex constants, inline a lone `end` and align a
comment.

Change-Id: Ibf3882dd134d33611138c2a9f89a3b2b37c136b4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38067
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons
2020-01-01 19:13:53 +01:00
committed by Nico Huber
parent 23d5c4c532
commit 7a61c6c398
1 changed files with 3 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
src/mainboard/asus/p5qpl-am/devicetree.cb
View File

@@ -21,14 +21,14 @@ chip northbridge/intel/x4x # Northbridge
device lapic 0 on end device lapic 0 on end
end end
chip cpu/intel/model_1067x # CPU chip cpu/intel/model_1067x # CPU
device lapic 0xACAC off end device lapic 0xacac off end
end end
end end
device domain 0 on # PCI domain device domain 0 on # PCI domain
device pci 0.0 on end # Host Bridge device pci 0.0 on end # Host Bridge
device pci 1.0 on end # PEG device pci 1.0 on end # PEG
device pci 2.0 on end # Integrated graphics controller device pci 2.0 on end # Integrated graphics controller
chip southbridge/intel/i82801gx # Southbridge chip southbridge/intel/i82801gx # Southbridge
register "pirqa_routing" = "0x0b" register "pirqa_routing" = "0x0b"
register "pirqb_routing" = "0x0b" register "pirqb_routing" = "0x0b"
register "pirqc_routing" = "0x0b" register "pirqc_routing" = "0x0b"
@@ -50,8 +50,7 @@ chip northbridge/intel/x4x # Northbridge
device pci 1b.0 on end # Audio device pci 1b.0 on end # Audio
device pci 1c.0 on end # PCIe 1: PCIe x1 slot device pci 1c.0 on end # PCIe 1: PCIe x1 slot
device pci 1c.1 on # PCIe 2: NIC device pci 1c.1 on # PCIe 2: NIC
device pci 00.0 on device pci 00.0 on end
end
end end
device pci 1c.2 off end # PCIe 3 device pci 1c.2 off end # PCIe 3
device pci 1c.3 off end # PCIe 4 device pci 1c.3 off end # PCIe 4