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Revert r5902 to make code more readable again. At least three people like to

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have this go away again.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>                                                                          
Acked-by: Kevin O'Connor <kevin@koconnor.net>                                                                          



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6273 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2011-01-19 06:54:42 +00:00
committed by Stefan Reinauer
parent 5bb9fd6e4d
commit 7b0500c24c
7 changed files with 190 additions and 139 deletions
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22
src/cpu/amd/car/cache_as_ram.inc
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@ -18,7 +18,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <cpu/x86/car.h>
#include <cpu/x86/mtrr.h>
#include <cpu/amd/mtrr.h>
@ -46,7 +45,8 @@
* xmm3: Backup EBX
*/
save_bist_result()
/* Save the BIST result. */
movl %eax, %ebp
/*
* For normal part %ebx already contain cpu_init_detected
@ -56,7 +56,10 @@
cache_as_ram_setup:
post_code(0xa0)
enable_sse()
/* Enable SSE. */
movl %cr4, %eax
orl $(3 << 9), %eax
movl %eax, %cr4
/* Figure out the CPU family. */
cvtsi2sd %ebx, %xmm3
@ -321,7 +324,10 @@ wbcache_post_fam10_setup:
post_code(0xa1)
enable_cache()
/* Enable cache. */
movl %cr0, %eax
andl $(~((1 << 30) | (1 << 29))), %eax
movl %eax, %cr0
jmp_if_k8(fam10_end_part1)
@ -403,9 +409,13 @@ CAR_FAM10_ap_out:
post_code(0xa5)
disable_sse()
/* Disable SSE. */
movl %cr4, %eax
andl $~(3 << 9), %eax
movl %eax, %cr4
restore_bist_result()
/* Restore the BIST result. */
movl %ebp, %eax
/* We need to set EBP? No need. */
movl %esp, %ebp