mainboard: add avalue/eax-785 ITX mainboard
It's AM3 Socket, 880M + SB850 chipset, similar with advansus/a785e-i. Onboard device UART, VGA, SATA, PCI Slot, 2 X16 PCIe slot, 4 X1 Pcie slot, Lan, audio, PS2 keyboard/mouse and USB are verified. Change-Id: I483363f5ff9fbfc5cda2f0521660751212f3e326 Signed-off-by: Kerry She <kerry.she@amd.com> Signed-off-by: Kerry She <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/208 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
This commit is contained in:
Kerry She
Marc Jones
274
src/mainboard/avalue/eax-785e/acpi_tables.c
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274
src/mainboard/avalue/eax-785e/acpi_tables.c
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <string.h>
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#include <arch/acpi.h>
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#include <arch/ioapic.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <cpu/x86/msr.h>
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#include <cpu/amd/mtrr.h>
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#include <cpu/amd/amdfam10_sysconf.h>
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#include "mb_sysconf.h"
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#define DUMP_ACPI_TABLES 0
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#if DUMP_ACPI_TABLES == 1
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static void dump_mem(u32 start, u32 end)
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{
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u32 i;
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print_debug("dump_mem:");
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for (i = start; i < end; i++) {
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if ((i & 0xf) == 0) {
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printk(BIOS_DEBUG, "\n%08x:", i);
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}
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printk(BIOS_DEBUG, " %02x", (u8)*((u8 *)i));
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}
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print_debug("\n");
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}
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#endif
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extern const unsigned char AmlCode[];
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extern const unsigned char AmlCode_ssdt[];
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#if CONFIG_ACPI_SSDTX_NUM >= 1
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extern const unsigned char AmlCode_ssdt2[];
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extern const unsigned char AmlCode_ssdt3[];
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extern const unsigned char AmlCode_ssdt4[];
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extern const unsigned char AmlCode_ssdt5[];
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#endif
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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/* Just a dummy */
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return current;
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}
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unsigned long acpi_fill_madt(unsigned long current)
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{
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/* create all subtables for processors */
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current = acpi_create_madt_lapics(current);
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/* Write SB800 IOAPIC, only one */
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 2,
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IO_APIC_ADDR, 0);
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 0, 2, 0);
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 9, 9, 0xF);
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/* 0: mean bus 0--->ISA */
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/* 0: PIC 0 */
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/* 2: APIC 2 */
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/* 5 mean: 0101 --> Edige-triggered, Active high */
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/* create all subtables for processors */
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/* current = acpi_create_madt_lapic_nmis(current, 5, 1); */
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/* 1: LINT1 connect to NMI */
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return current;
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}
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unsigned long write_acpi_tables(unsigned long start)
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{
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unsigned long current;
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acpi_rsdp_t *rsdp;
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acpi_rsdt_t *rsdt;
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acpi_hpet_t *hpet;
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acpi_madt_t *madt;
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acpi_srat_t *srat;
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acpi_slit_t *slit;
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acpi_fadt_t *fadt;
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acpi_facs_t *facs;
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acpi_header_t *dsdt;
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acpi_header_t *ssdt;
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#if CONFIG_ACPI_SSDTX_NUM >= 1
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acpi_header_t *ssdtx;
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void *p;
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int i;
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#endif
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get_bus_conf(); /* it will get sblk, pci1234, hcdn, and sbdn */
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/* Align ACPI tables to 16 bytes */
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start = (start + 0x0f) & -0x10;
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current = start;
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printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
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/* We need at least an RSDP and an RSDT Table */
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rsdp = (acpi_rsdp_t *) current;
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current += sizeof(acpi_rsdp_t);
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rsdt = (acpi_rsdt_t *) current;
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current += sizeof(acpi_rsdt_t);
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/* clear all table memory */
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memset((void *)start, 0, current - start);
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acpi_write_rsdp(rsdp, rsdt, NULL);
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acpi_write_rsdt(rsdt);
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/*
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* We explicitly add these tables later on:
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*/
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current = ( current + 0x07) & -0x08;
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printk(BIOS_DEBUG, "ACPI: * HPET at %lx\n", current);
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hpet = (acpi_hpet_t *) current;
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current += sizeof(acpi_hpet_t);
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acpi_create_hpet(hpet);
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acpi_add_table(rsdp, hpet);
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/* If we want to use HPET Timers Linux wants an MADT */
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current = ( current + 0x07) & -0x08;
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printk(BIOS_DEBUG, "ACPI: * MADT at %lx\n",current);
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madt = (acpi_madt_t *) current;
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acpi_create_madt(madt);
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current += madt->header.length;
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acpi_add_table(rsdp, madt);
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/* SRAT */
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current = ( current + 0x07) & -0x08;
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printk(BIOS_DEBUG, "ACPI: * SRAT at %lx\n", current);
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srat = (acpi_srat_t *) current;
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acpi_create_srat(srat);
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current += srat->header.length;
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acpi_add_table(rsdp, srat);
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/* SLIT */
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current = ( current + 0x07) & -0x08;
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printk(BIOS_DEBUG, "ACPI: * SLIT at %lx\n", current);
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slit = (acpi_slit_t *) current;
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acpi_create_slit(slit);
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current += slit->header.length;
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acpi_add_table(rsdp, slit);
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/* SSDT */
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current = ( current + 0x0f) & -0x10;
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printk(BIOS_DEBUG, "ACPI: * SSDT at %lx\n", current);
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ssdt = (acpi_header_t *)current;
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memcpy(ssdt, &AmlCode_ssdt, sizeof(acpi_header_t));
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current += ssdt->length;
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memcpy(ssdt, &AmlCode_ssdt, ssdt->length);
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//Here you need to set value in pci1234, sblk and sbdn in get_bus_conf.c
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update_ssdt((void*)ssdt);
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/* recalculate checksum */
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ssdt->checksum = 0;
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ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
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acpi_add_table(rsdp,ssdt);
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printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current);
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current = acpi_add_ssdt_pstates(rsdp, current);
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#if CONFIG_ACPI_SSDTX_NUM >= 1
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/* same htio, but different position? We may have to copy,
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change HCIN, and recalculate the checknum and add_table */
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for(i=1;i<sysconf.hc_possible_num;i++) { // 0: is hc sblink
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if((sysconf.pci1234[i] & 1) != 1 ) continue;
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u8 c;
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if (i < 7) {
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c = (u8) ('4' + i - 1);
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} else {
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c = (u8) ('A' + i - 1 - 6);
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}
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current = ( current + 0x07) & -0x08;
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printk(BIOS_DEBUG, "ACPI: * SSDT for PCI%c at %lx\n", c, current); //pci0 and pci1 are in dsdt
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ssdtx = (acpi_header_t *)current;
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switch (sysconf.hcid[i]) {
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case 1:
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p = &AmlCode_ssdt2;
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break;
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case 2:
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p = &AmlCode_ssdt3;
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break;
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case 3: /* 8131 */
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p = &AmlCode_ssdt4;
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break;
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default:
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/* HTX no io apic */
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p = &AmlCode_ssdt5;
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break;
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}
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memcpy(ssdtx, p, sizeof(acpi_header_t));
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current += ssdtx->length;
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memcpy(ssdtx, p, ssdtx->length);
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update_ssdtx((void *)ssdtx, i);
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ssdtx->checksum = 0;
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ssdtx->checksum = acpi_checksum((u8 *)ssdtx, ssdtx->length);
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acpi_add_table(rsdp, ssdtx);
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}
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#endif
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/* DSDT */
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current = ( current + 0x07) & -0x08;
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printk(BIOS_DEBUG, "ACPI: * DSDT at %lx\n", current);
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dsdt = (acpi_header_t *)current; // it will used by fadt
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memcpy(dsdt, &AmlCode, sizeof(acpi_header_t));
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current += dsdt->length;
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memcpy(dsdt, &AmlCode, dsdt->length);
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printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n",dsdt,dsdt->length);
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/* FACS */ // it needs 64 bit alignment
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current = ( current + 0x07) & -0x08;
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printk(BIOS_DEBUG, "ACPI: * FACS at %lx\n", current);
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facs = (acpi_facs_t *) current; // it will be used by fadt
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current += sizeof(acpi_facs_t);
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acpi_create_facs(facs);
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/* FDAT */
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#if CONFIG_BOARD_HAS_FADT == 1
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current = ( current + 0x07) & -0x08;
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printk(BIOS_DEBUG, "ACPI: * FADT at %lx\n", current);
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fadt = (acpi_fadt_t *) current;
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current += sizeof(acpi_fadt_t);
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acpi_create_fadt(fadt, facs, dsdt);
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acpi_add_table(rsdp, fadt);
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#endif
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#if DUMP_ACPI_TABLES == 1
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printk(BIOS_DEBUG, "rsdp\n");
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dump_mem(rsdp, ((void *)rsdp) + sizeof(acpi_rsdp_t));
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printk(BIOS_DEBUG, "rsdt\n");
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dump_mem(rsdt, ((void *)rsdt) + sizeof(acpi_rsdt_t));
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printk(BIOS_DEBUG, "madt\n");
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dump_mem(madt, ((void *)madt) + madt->header.length);
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printk(BIOS_DEBUG, "srat\n");
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dump_mem(srat, ((void *)srat) + srat->header.length);
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printk(BIOS_DEBUG, "slit\n");
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dump_mem(slit, ((void *)slit) + slit->header.length);
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printk(BIOS_DEBUG, "ssdt\n");
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dump_mem(ssdt, ((void *)ssdt) + ssdt->length);
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printk(BIOS_DEBUG, "fadt\n");
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dump_mem(fadt, ((void *)fadt) + fadt->header.length);
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#endif
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printk(BIOS_INFO, "ACPI: done.\n");
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return current;
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}
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