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mb/google/mancomb: Add ACPI support for Chrome EC

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BUG=b:182211161
TEST=builds

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: Ibce15d2e4340515353a33c593d065df50a15286a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51628
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
This commit is contained in:
Eric Lai
2021-03-18 16:39:49 +08:00
committed by Raul Rangel
parent e93e693173
commit 7bbcdc2f20
2 changed files with 16 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
src/mainboard/google/mancomb/dsdt.asl
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@@ -1,6 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h> #include <acpi/acpi.h>
#include <variant/ec.h>
DefinitionBlock ( DefinitionBlock (
"dsdt.aml", "dsdt.aml",
"DSDT", "DSDT",
@@ -13,4 +15,13 @@ DefinitionBlock (
#include <acpi/dsdt_top.asl> #include <acpi/dsdt_top.asl>
#include <soc.asl> #include <soc.asl>
/* Chrome OS Embedded Controller */
Scope (\_SB.PCI0.LPCB)
{
/* ACPI code for EC SuperIO functions */
#include <ec/google/chromeec/acpi/superio.asl>
/* ACPI code for EC functions */
#include <ec/google/chromeec/acpi/ec.asl>
}
} }

5
src/mainboard/google/mancomb/variants/baseboard/devicetree.cb
View File

@@ -42,5 +42,10 @@ chip soc/amd/cezanne
device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
device ref gfx on end # Internal GPU (GFX) device ref gfx on end # Internal GPU (GFX)
end end
device ref lpc_bridge on
chip ec/google/chromeec
device pnp 0c09.0 on end
end
end
end # domain end # domain
end # chip soc/amd/cezanne end # chip soc/amd/cezanne