Add AMD dbm690t ACPI support.

The following ACPI features are supported.
1. S1, S5 sleep and wake up (by power button or PS/2 keyboard/mouse).
2. AMD powernow-k8 driver.
3. Thermal configuration based on ADT7461.
4. IDE timing settings.
5. HPET timer.
6. Interrupt routing based on ACPI table.


Signed-off-by:  Joe Bao <zheng.bao@amd.com>
Reviewed-by:    Maggie Li <maggie.li@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3787 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Joe Bao
2008-12-01 19:52:54 +00:00
committed by Marc Jones
parent 40d46ba383
commit 7c3d3b2027
9 changed files with 455 additions and 208 deletions

View File

@@ -19,12 +19,25 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
#include <boot/coreboot_tables.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <device/pci_def.h>
#include "chip.h"
#define ADT7461_ADDRESS 0x4C
#define SMBUS_IO_BASE 0x1000
extern int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address);
extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address,
u8 val);
#define ADT7461_read_byte(address) \
do_smbus_read_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address)
#define ADT7461_write_byte(address, val) \
do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
/********************************************************
* dbm690t uses a BCM5789 as on-board NIC.
* It has a pin named LOW_POWER to enable it into LOW POWER state.
@@ -63,6 +76,109 @@ static void enable_onboard_nic()
outb(byte, 0xC52);
}
/********************************************************
* dbm690t uses SB600 GPIO9 to detect IDE_DMA66.
* IDE_DMA66 is routed to GPIO 9. So we read Gpio 9 to
* get the cable type, 40 pin or 80 pin?
********************************************************/
static void get_ide_dma66()
{
u8 byte;
/*u32 sm_dev, ide_dev; */
device_t sm_dev, ide_dev;
struct bus pbus;
sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
byte =
pci_cf8_conf1.read8(&pbus, sm_dev->bus->secondary,
sm_dev->path.u.pci.devfn, 0xA9);
byte |= (1 << 5); /* Set Gpio9 as input */
pci_cf8_conf1.write8(&pbus, sm_dev->bus->secondary,
sm_dev->path.u.pci.devfn, 0xA9, byte);
ide_dev = dev_find_slot(0, PCI_DEVFN(0x14, 1));
byte =
pci_cf8_conf1.read8(&pbus, ide_dev->bus->secondary,
ide_dev->path.u.pci.devfn, 0x56);
byte &= ~(7 << 0);
if ((1 << 5) & pci_cf8_conf1.
read8(&pbus, sm_dev->bus->secondary, sm_dev->path.u.pci.devfn,
0xAA))
byte |= 2 << 0; /* mode 2 */
else
byte |= 5 << 0; /* mode 5 */
pci_cf8_conf1.write8(&pbus, ide_dev->bus->secondary,
ide_dev->path.u.pci.devfn, 0x56, byte);
}
/*
* set thermal config
*/
static void set_thermal_config()
{
u8 byte;
u16 word;
device_t sm_dev;
struct bus pbus;
/* set ADT 7461 */
ADT7461_write_byte(0x0B, 0x50); /* Local Temperature Hight limit */
ADT7461_write_byte(0x0C, 0x00); /* Local Temperature Low limit */
ADT7461_write_byte(0x0D, 0x50); /* External Temperature Hight limit High Byte */
ADT7461_write_byte(0x0E, 0x00); /* External Temperature Low limit High Byte */
ADT7461_write_byte(0x19, 0x55); /* External THERM limit */
ADT7461_write_byte(0x20, 0x55); /* Local THERM limit */
byte = ADT7461_read_byte(0x02); /* read status register to clear it */
printk_info("Init adt7461 end , status 0x02 %02x\n", byte);
/* sb600 settings for thermal config */
/* set SB600 GPIO 64 to GPIO with pull-up */
byte = pm2_ioread(0x42);
byte &= 0x3f;
pm2_iowrite(0x42, byte);
/* set GPIO 64 to input */
sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
word =
pci_cf8_conf1.read16(&pbus, sm_dev->bus->secondary,
sm_dev->path.u.pci.devfn, 0x56);
word |= 1 << 7;
pci_cf8_conf1.write16(&pbus, sm_dev->bus->secondary,
sm_dev->path.u.pci.devfn, 0x56, word);
/* set GPIO 64 internal pull-up */
byte = pm2_ioread(0xf0);
byte &= 0xee;
pm2_iowrite(0xf0, byte);
/* set Talert to be active low */
byte = pm_ioread(0x67);
byte &= ~(1 << 5);
pm_iowrite(0x67, byte);
/* set Talert to generate ACPI event */
byte = pm_ioread(0x3c);
byte &= 0xf3;
pm_iowrite(0x3c, byte);
/* THERMTRIP pin */
/* byte = pm_ioread(0x68);
* byte |= 1 << 3;
* pm_iowrite(0x68, byte);
*
* byte = pm_ioread(0x55);
* byte |= 1 << 0;
* pm_iowrite(0x55, byte);
*
* byte = pm_ioread(0x67);
* byte &= ~( 1 << 6);
* pm_iowrite(0x67, byte);
*/
}
/*************************************************
* enable the dedicated function in dbm690t board.
* This function called early than rs690_enable.
@@ -72,47 +188,54 @@ void dbm690t_enable(device_t dev)
struct mainboard_amd_dbm690t_config *mainboard =
(struct mainboard_amd_dbm690t_config *)dev->chip_info;
printk_info("Mainboard DBM690T Enable. dev=0x%x\n", dev);
#if (CONFIG_GFXUMA == 1)
msr_t msr, msr2;
/* TOP_MEM: the top of DRAM below 4G */
msr = rdmsr(TOP_MEM);
printk_info("dbm690t_enable, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", msr.lo, msr.hi);
printk_info
("dbm690t_enable, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
msr.lo, msr.hi);
/* TOP_MEM2: the top of DRAM above 4G */
msr2 = rdmsr(TOP_MEM2);
printk_info("dbm690t_enable, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", msr2.lo, msr2.hi);
printk_info
("dbm690t_enable, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
msr2.lo, msr2.hi);
switch (msr.lo) {
case 0x10000000: /* 256M system memory */
uma_memory_size = 0x2000000; /* 32M recommended UMA */
break;
case 0x10000000: /* 256M system memory */
uma_memory_size = 0x2000000; /* 32M recommended UMA */
break;
case 0x18000000: /* 384M system memory */
uma_memory_size = 0x4000000; /* 64M recommended UMA */
break;
case 0x18000000: /* 384M system memory */
uma_memory_size = 0x4000000; /* 64M recommended UMA */
break;
case 0x20000000: /* 512M system memory */
uma_memory_size = 0x4000000; /* 64M recommended UMA */
break;
case 0x20000000: /* 512M system memory */
uma_memory_size = 0x4000000; /* 64M recommended UMA */
break;
default: /* 1GB and above system memory */
uma_memory_size = 0x8000000; /* 128M recommended UMA */
break;
default: /* 1GB and above system memory */
uma_memory_size = 0x8000000; /* 128M recommended UMA */
break;
}
uma_memory_start = msr.lo - uma_memory_size;/* TOP_MEM1 */
printk_info("dbm690t_enable: uma size 0x%08x, memory start 0x%08x\n", uma_memory_size, uma_memory_start);
uma_memory_start = msr.lo - uma_memory_size; /* TOP_MEM1 */
printk_info("dbm690t_enable: uma size 0x%08x, memory start 0x%08x\n",
uma_memory_size, uma_memory_start);
/* TODO: TOP_MEM2 */
#else
uma_memory_size = 0x8000000; /* 128M recommended UMA */
uma_memory_start = 0x38000000; /* 1GB system memory supposed */
uma_memory_size = 0x8000000; /* 128M recommended UMA */
uma_memory_start = 0x38000000; /* 1GB system memory supposed */
#endif
printk_info("dbm690t_enable. dev=0x%x\n", dev);
enable_onboard_nic();
get_ide_dma66();
set_thermal_config();
}
/*
@@ -122,5 +245,5 @@ struct chip_operations mainboard_amd_dbm690t_ops = {
#if CONFIG_CHIP_NAME == 1
CHIP_NAME("AMD Dbm690t Mainboard")
#endif
.enable_dev = dbm690t_enable,
.enable_dev = dbm690t_enable,
};