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soc/intel/cannonlake: Enable wake from USB in S4

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The xHCI controller supports waking the system from S1-S4.
Thus specify that the deepest sleep state is S4 in _PRW.

Tested on Prodrive/hermes. The board now wakes from S4 as well by
pressing a key on the USB keyboard.

Change-Id: I0bb266e70ee6b4eb8922671b7d0078db0d29a1da
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49224
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Rudolph
2021-01-07 16:47:23 +01:00
committed by Patrick Georgi
parent a93cb11ed6
commit 7c8de869a2
1 changed files with 4 additions and 1 deletions
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5
src/soc/intel/cannonlake/acpi/xhci.asl
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@@ -67,7 +67,7 @@ Device (XHCI)
{ {
Name (_ADR, 0x00140000) Name (_ADR, 0x00140000)
Name (_PRW, Package () { GPE0_PME_B0, 3 }) Name (_PRW, Package () { GPE0_PME_B0, 4 })
Method (_DSW, 3) Method (_DSW, 3)
{ {
@@ -79,6 +79,9 @@ Device (XHCI)
Name (_S0W, 3) /* D3 can wake device in S0 */ Name (_S0W, 3) /* D3 can wake device in S0 */
Name (_S3W, 3) /* D3 can wake system from S3 */ Name (_S3W, 3) /* D3 can wake system from S3 */
Name (_S4D, 3) /* D3 supported in S4 */
Name (_S4W, 3) /* D3 can wake system from S4 */
OperationRegion (XPRT, PCI_Config, 0x00, 0x100) OperationRegion (XPRT, PCI_Config, 0x00, 0x100)
Field (XPRT, AnyAcc, NoLock, Preserve) Field (XPRT, AnyAcc, NoLock, Preserve)
{ {