1201_ht_bus0_dev0_fidvid_core.diff
https://openbios.org/roundup/linuxbios/issue41 Lord have mercy upon us. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2118 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
@@ -1,14 +1,24 @@
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#ifndef CPU_AMD_DUALCORE_H
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#define CPU_AMD_DUALCORE_H
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struct device;
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#if defined(__GNUC__)
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unsigned int read_nb_cfg_54(void);
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#endif
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struct node_core_id {
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unsigned nodeid;
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unsigned coreid;
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};
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void amd_sibling_init(struct device *cpu, struct node_core_id id);
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struct node_core_id get_node_core_id(void);
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#if defined(__GNUC__)
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// it can be used to get unitid and coreid it running only
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struct node_core_id get_node_core_id(unsigned int nb_cfg_54);
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#endif
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#ifndef __ROMCC__
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struct device;
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unsigned get_apicid_base(unsigned ioapic_num);
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void amd_sibling_init(struct device *cpu);
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#endif
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#endif /* CPU_AMD_DUALCORE_H */
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@@ -10,17 +10,17 @@
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# define NEED_LAPIC 1
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#endif
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static inline unsigned long lapic_read(unsigned long reg)
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static inline __attribute__((always_inline)) unsigned long lapic_read(unsigned long reg)
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{
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return *((volatile unsigned long *)(LAPIC_DEFAULT_BASE+reg));
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}
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static inline void lapic_write(unsigned long reg, unsigned long v)
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static inline __attribute__((always_inline)) void lapic_write(unsigned long reg, unsigned long v)
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{
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*((volatile unsigned long *)(LAPIC_DEFAULT_BASE+reg)) = v;
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}
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static inline void lapic_wait_icr_idle(void)
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static inline __attribute__((always_inline)) void lapic_wait_icr_idle(void)
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{
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do { } while ( lapic_read( LAPIC_ICR ) & LAPIC_ICR_BUSY );
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}
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@@ -46,13 +46,14 @@ static inline void disable_lapic(void)
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wrmsr(LAPIC_BASE_MSR, msr);
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}
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static inline unsigned long lapicid(void)
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static inline __attribute__((always_inline)) unsigned long lapicid(void)
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{
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return lapic_read(LAPIC_ID) >> 24;
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}
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static inline void stop_this_cpu(void)
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static inline __attribute__((always_inline)) void stop_this_cpu(void)
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{
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unsigned apicid;
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apicid = lapicid();
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@@ -4,7 +4,7 @@
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#include <device/hypertransport_def.h>
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unsigned int hypertransport_scan_chain(struct bus *bus,
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unsigned min_devfn, unsigned max_devfn, unsigned int max);
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unsigned min_devfn, unsigned max_devfn, unsigned int max, unsigned offset_unitid);
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unsigned int ht_scan_bridge(struct device *dev, unsigned int max);
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extern struct device_operations default_ht_ops_bus;
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@@ -438,6 +438,9 @@
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#define PCI_DEVICE_ID_AMD_8131_PCIX 0x7450
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#define PCI_DEVICE_ID_AMD_8131_IOAPIC 0x7451
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#define PCI_DEVICE_ID_AMD_8132_PCIX 0x7458
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#define PCI_DEVICE_ID_AMD_8132_IOAPIC 0x7459
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#define PCI_VENDOR_ID_TRIDENT 0x1023
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#define PCI_DEVICE_ID_TRIDENT_4DWAVE_DX 0x2000
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#define PCI_DEVICE_ID_TRIDENT_4DWAVE_NX 0x2001
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@@ -910,6 +913,20 @@
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#define PCI_DEVICE_ID_CERN_HIPPI_DST 0x0021
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#define PCI_DEVICE_ID_CERN_HIPPI_SRC 0x0022
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#define PCI_DEVICE_ID_NVIDIA_CK8S_HT 0x00e1
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#define PCI_DEVICE_ID_NVIDIA_CK8S_LPC 0x00e0
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#define PCI_DEVICE_ID_NVIDIA_CK8S_SM 0x00e4
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#define PCI_DEVICE_ID_NVIDIA_CK8S_USB 0x00e7
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#define PCI_DEVICE_ID_NVIDIA_CK8S_USB2 0x00e8
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#define PCI_DEVICE_ID_NVIDIA_CK8S_NIC 0x00e6
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#define PCI_DEVICE_ID_NVIDIA_CK8S_ACI 0x00ea
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#define PCI_DEVICE_ID_NVIDIA_CK8S_MCI 0x00e9
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#define PCI_DEVICE_ID_NVIDIA_CK8S_IDE 0x00e5
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#define PCI_DEVICE_ID_NVIDIA_CK8S_SATA0 0x00ee
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#define PCI_DEVICE_ID_NVIDIA_CK8S_SATA1 0x00e3
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#define PCI_DEVICE_ID_NVIDIA_CK8S_PCI 0x00ed
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#define PCI_DEVICE_ID_NVIDIA_CK8S_PCI_AGP 0x00e2
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#define PCI_VENDOR_ID_NVIDIA 0x10de
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#define PCI_DEVICE_ID_NVIDIA_TNT 0x0020
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#define PCI_DEVICE_ID_NVIDIA_TNT2 0x0028
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@@ -1060,8 +1077,8 @@
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#define PCI_DEVICE_ID_VIA_8233C_0 0x3109
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#define PCI_DEVICE_ID_VIA_8361 0x3112
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#define PCI_DEVICE_ID_VIA_8233A 0x3147
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#define PCI_DEVICE_ID_VIA_CLE266_VGA 0x3122
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#define PCI_DEVICE_ID_VIA_8623 0x3123
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#define PCI_DEVICE_ID_VIA_CLE266_VGA 0x3122
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#define PCI_DEVICE_ID_VIA_8623 0x3123
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#define PCI_DEVICE_ID_VIA_86C100A 0x6100
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#define PCI_DEVICE_ID_VIA_8231 0x8231
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#define PCI_DEVICE_ID_VIA_8231_4 0x8235
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@@ -1207,6 +1224,21 @@
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#define PCI_DEVICE_ID_SERVERWORKS_GCLE2 0x0227
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#define PCI_DEVICE_ID_SERVERWORKS_CSB5ISA 0x0230
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#define PCI_DEVICE_ID_SERVERWORKS_BCM5780_PXB 0x0130
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#define PCI_DEVICE_ID_SERVERWORKS_BCM5780_PCIE 0x0132
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#define PCI_DEVICE_ID_BROADCOM_BCM5780_NIC 0x1668
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#define PCI_DEVICE_ID_BROADCOM_BCM5780_NIC1 0x1669
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#define PCI_DEVICE_ID_SERVERWORKS_BCM5785_HT_PXB 0x0036
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#define PCI_DEVICE_ID_SERVERWORKS_BCM5785_PXBX 0x0104
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#define PCI_DEVICE_ID_SERVERWORKS_BCM5785_SATA 0x024a
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#define PCI_DEVICE_ID_SERVERWORKS_BCM5785_SB_PCI_MAIN 0x0205
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#define PCI_DEVICE_ID_SERVERWORKS_BCM5785_IDE 0x0214
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#define PCI_DEVICE_ID_SERVERWORKS_BCM5785_LPC 0x0234
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#define PCI_DEVICE_ID_SERVERWORKS_BCM5785_WDT 0x0238
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#define PCI_DEVICE_ID_SERVERWORKS_BCM5785_XIOAPIC 0x0235
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#define PCI_DEVICE_ID_SERVERWORKS_BCM5785_USB 0x0223
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#define PCI_VENDOR_ID_SBE 0x1176
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#define PCI_DEVICE_ID_SBE_WANXL100 0x0301
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#define PCI_DEVICE_ID_SBE_WANXL200 0x0302
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@@ -1763,7 +1795,6 @@
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#define PCI_DEVICE_ID_INTEL_82801CA_1F3 0x2483
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#define PCI_DEVICE_ID_INTEL_82801CA_1D1 0x2484
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#define PCI_DEVICE_ID_INTEL_82801CA_1F5 0x2485
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#define PCI_DEVICE_ID_INTEL_82801CA_1F6 0x2486
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#define PCI_DEVICE_ID_INTEL_82801CA_1D2 0x2487
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#define PCI_DEVICE_ID_INTEL_82870_1E0 0x1461
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#define PCI_DEVICE_ID_INTEL_82870_1F0 0x1460
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@@ -1793,17 +1824,15 @@
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#define PCI_DEVICE_ID_INTEL_82801E_11 0x245b
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#define PCI_DEVICE_ID_INTEL_82801E_13 0x245d
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#define PCI_DEVICE_ID_INTEL_82801E_14 0x245e
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#define PCI_DEVICE_ID_INTEL_82801CA_LAN 0x2449
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#define PCI_DEVICE_ID_INTEL_82801CA_PCI 0x244e // Same as 82801ER
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#define PCI_DEVICE_ID_INTEL_82801CA_LPC 0x2480
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#define PCI_DEVICE_ID_INTEL_82801CA_USB 0x2482
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#define PCI_DEVICE_ID_INTEL_82801CA_SMB 0x2483
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#define PCI_DEVICE_ID_INTEL_82801CA_USB2 0x2484
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#define PCI_DEVICE_ID_INTEL_82801CA_AC97_AUDIO 0x2485
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#define PCI_DEVICE_ID_INTEL_82801CA_AC97_MODEM 0x2486
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#define PCI_DEVICE_ID_INTEL_82801CA_USB3 0x2487
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#define PCI_DEVICE_ID_INTEL_82801CA_0 0x2480
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#define PCI_DEVICE_ID_INTEL_82801CA_2 0x2482
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#define PCI_DEVICE_ID_INTEL_82801CA_3 0x2483
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#define PCI_DEVICE_ID_INTEL_82801CA_4 0x2484
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#define PCI_DEVICE_ID_INTEL_82801CA_5 0x2485
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#define PCI_DEVICE_ID_INTEL_82801CA_6 0x2486
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#define PCI_DEVICE_ID_INTEL_82801CA_7 0x2487
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#define PCI_DEVICE_ID_INTEL_82801CA_10 0x248a
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#define PCI_DEVICE_ID_INTEL_82801CA_IDE 0x248b
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#define PCI_DEVICE_ID_INTEL_82801CA_11 0x248b
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#define PCI_DEVICE_ID_INTEL_82801CA_12 0x248c
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#define PCI_DEVICE_ID_INTEL_82801DB_0 0x24c0
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#define PCI_DEVICE_ID_INTEL_82801DB_2 0x24c2
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