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tigerlake: enable DPTF functionality for volteer

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Enable DPTF functionality for volteer platform

BRANCH=None
BUG=b:149722146
TEST=Built and tested on volteer system

Change-Id: I385fb409ccd291d97369295ff99f21c9430880f9
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41427
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sumeet R Pawnikar
2020-05-08 19:22:07 +05:30
committed by Tim Wawrzynczak
parent 32585de39e
commit 7d6bc60db9
9 changed files with 199 additions and 0 deletions
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3
src/soc/intel/tigerlake/fsp_params.c
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@@ -193,6 +193,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->PchPwrOptEnable = !(config->DmiPwrOptimizeDisable);
params->SataPwrOptEnable = !(config->SataPwrOptimizeDisable);
/* Enable TCPU for processor thermal control */
params->Device4Enable = config->Device4Enable;
/* LAN */
dev = pcidev_path_on_root(PCH_DEVFN_GBE);
if (!dev)