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cpu/via/c7: Don't manually include udelay_io.c

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Use UDELAY_IO selected by CPU_VIA_C7, so no manual inclusion
(or secondary UDELAY implementation) is needed

Change-Id: Ib086a1bfe8ffca5757bf553c5a62a45da7a410b6
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13782
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Stefan Reinauer
2016-02-24 11:08:53 -08:00
committed by Martin Roth
parent 3d840d09ae
commit 7e3903b1f1
9 changed files with 3 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/cpu/via/c7/Kconfig
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@@ -9,7 +9,9 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_VERSTAGE_X86_32 select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32
select UDELAY_TSC # Missing tsc_freq_mhz and TSC_CONSTANT_RATE
#select UDELAY_TSC
select UDELAY_IO
select MMX select MMX
select SSE2 select SSE2

1
src/mainboard/bcom/winnetp680/Kconfig
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@@ -8,7 +8,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SUPERIO_WINBOND_W83697HF select SUPERIO_WINBOND_W83697HF
select HAVE_PIRQ_TABLE select HAVE_PIRQ_TABLE
select HAVE_OPTION_TABLE select HAVE_OPTION_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512 select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR config MAINBOARD_DIR

1
src/mainboard/bcom/winnetp680/romstage.c
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@@ -23,7 +23,6 @@
#include <console/console.h> #include <console/console.h>
#include <northbridge/via/cn700/raminit.h> #include <northbridge/via/cn700/raminit.h>
#include <cpu/x86/bist.h> #include <cpu/x86/bist.h>
#include "drivers/pc80/udelay_io.c"
#include <delay.h> #include <delay.h>
#include <lib.h> #include <lib.h>
#include <spd.h> #include <spd.h>

1
src/mainboard/jetway/j7f2/romstage.c
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@@ -23,7 +23,6 @@
#include <console/console.h> #include <console/console.h>
#include <northbridge/via/cn700/raminit.h> #include <northbridge/via/cn700/raminit.h>
#include <cpu/x86/bist.h> #include <cpu/x86/bist.h>
#include "drivers/pc80/udelay_io.c"
#include <delay.h> #include <delay.h>
#include "southbridge/via/vt8237r/early_smbus.c" #include "southbridge/via/vt8237r/early_smbus.c"
#include <superio/fintek/common/fintek.h> #include <superio/fintek/common/fintek.h>

1
src/mainboard/via/epia-cn/romstage.c
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@@ -24,7 +24,6 @@
#include <lib.h> #include <lib.h>
#include <northbridge/via/cn700/raminit.h> #include <northbridge/via/cn700/raminit.h>
#include <cpu/x86/bist.h> #include <cpu/x86/bist.h>
#include "drivers/pc80/udelay_io.c"
#include <delay.h> #include <delay.h>
#include "southbridge/via/vt8237r/early_smbus.c" #include "southbridge/via/vt8237r/early_smbus.c"
#include "southbridge/via/vt8237r/early_serial.c" #include "southbridge/via/vt8237r/early_serial.c"

1
src/mainboard/via/epia-m700/romstage.c
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@@ -30,7 +30,6 @@
#include <lib.h> #include <lib.h>
#include <northbridge/via/vx800/vx800.h> #include <northbridge/via/vx800/vx800.h>
#include <cpu/x86/bist.h> #include <cpu/x86/bist.h>
#include "drivers/pc80/udelay_io.c"
#include <delay.h> #include <delay.h>
#include <string.h> #include <string.h>
/* This file contains the board-special SI value for raminit.c. */ /* This file contains the board-special SI value for raminit.c. */

1
src/mainboard/via/pc2500e/Kconfig
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@@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE select HAVE_MP_TABLE
select SMP select SMP
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512 select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR config MAINBOARD_DIR

1
src/mainboard/via/pc2500e/romstage.c
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@@ -24,7 +24,6 @@
#include <lib.h> #include <lib.h>
#include <northbridge/via/cn700/raminit.h> #include <northbridge/via/cn700/raminit.h>
#include <cpu/x86/bist.h> #include <cpu/x86/bist.h>
#include "drivers/pc80/udelay_io.c"
#include <delay.h> #include <delay.h>
#include "southbridge/via/vt8237r/early_smbus.c" #include "southbridge/via/vt8237r/early_smbus.c"
#include <superio/ite/common/ite.h> #include <superio/ite/common/ite.h>

1
src/mainboard/via/vt8454c/romstage.c
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@@ -23,7 +23,6 @@
#include <lib.h> #include <lib.h>
#include <northbridge/via/cx700/raminit.h> #include <northbridge/via/cx700/raminit.h>
#include <cpu/x86/bist.h> #include <cpu/x86/bist.h>
#include "drivers/pc80/udelay_io.c"
#include <delay.h> #include <delay.h>
#include "northbridge/via/cx700/early_smbus.c" #include "northbridge/via/cx700/early_smbus.c"
#include "lib/debug.c" #include "lib/debug.c"