device/dram/ddr2.c: Decoding byte[12] bit7 as self refresh flag

"Annex J: Serial Presence Detects for DDR2 SDRAM (Revision 1.3)" note
4 says bit7 of byte 12 indicates whether the assembly supports self
refresh.

This patch decodes this and modifies decoding tRR accordingly.

Change-Id: I091121a5d08159cea4befdedb5f3a92ce132c6e5
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/21620
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

src/include/device/dram/ddr2.h

@@ -119,6 +119,8 @@ union dimm_flags_st {
 		unsigned bl4:1;
 		/* DIMM Package is stack */
 		unsigned stacked:1;
+		/* the assembly supports self refresh */
+		unsigned self_refresh:1;
 	};
 	unsigned int raw;
 };