util/inteltool: Add support for Alder Lake-N

Reference: Intel Processor and Intel Core i3 N-Series Datasheet,
Volume 1 of 2 (#759603)

Change-Id: Ib3225088fa08fb7e5a60c87d0f1f6b3001f5b562
Signed-off-by: Brandon Weeks <me@brandonweeks.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79732
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
This commit is contained in:
Brandon Weeks
2023-12-26 15:55:03 -08:00
committed by Felix Held
parent 30bd24fd26
commit 7ee7b137a7
11 changed files with 734 additions and 2 deletions

View File

@@ -309,6 +309,7 @@ static inline uint32_t inl(unsigned port)
#define PCI_DEVICE_ID_INTEL_ADL_P 0x5182
#define PCI_DEVICE_ID_INTEL_ADL_M 0x5187
#define PCI_DEVICE_ID_INTEL_RPL_P 0x519d
#define PCI_DEVICE_ID_INTEL_ADL_N 0x5481
#define PCI_DEVICE_ID_INTEL_EHL 0x4b00
#define PCI_DEVICE_ID_INTEL_JSL 0x4d87
@@ -388,6 +389,9 @@ static inline uint32_t inl(unsigned port)
#define PCI_DEVICE_ID_INTEL_CORE_ADL_ID_P_6_8 0x4641 /* Alderlake P 6+8 */
#define PCI_DEVICE_ID_INTEL_CORE_ADL_ID_P_4_8 0x4621 /* Alderlake P 4+8 */
#define PCI_DEVICE_ID_INTEL_CORE_ADL_ID_P_2_8 0x4601 /* Alderlake P 2+8 */
#define PCI_DEVICE_ID_INTEL_CORE_ADL_ID_N_0_8 0x4617 /* Alderlake N 0+8 */
#define PCI_DEVICE_ID_INTEL_CORE_ADL_ID_N_0_4 0x461b /* Alderlake N 0+4 */
#define PCI_DEVICE_ID_INTEL_CORE_ADL_ID_N_0_4_1 0x461c /* Alderlake N 0+4 */
#define PCI_DEVICE_ID_INTEL_CORE_RPL_ID_H_8_6 0xa706 /* Raptorlake H 8+6 */
/* Intel GPUs */
@@ -469,6 +473,9 @@ static inline uint32_t inl(unsigned port)
#define PCI_DEVICE_ID_INTEL_ADL_S_GT1_2 0x4682
#define PCI_DEVICE_ID_INTEL_ADL_S_GT1_3 0x4690
#define PCI_DEVICE_ID_INTEL_ADL_S_GT1_4 0x4692
#define PCI_DEVICE_ID_INTEL_ADL_N_UHD 0x46D0
#define PCI_DEVICE_ID_INTEL_ADL_N_UHD_2 0x46D1
#define PCI_DEVICE_ID_INTEL_ADL_N_UHD_3 0x46D2
#define PCI_DEVICE_ID_INTEL_RPL_H_IRIS_XE 0xa7a0
#if !defined(__DARWIN__) && !defined(__FreeBSD__)