From 7ef19036fbfeaad63ccb4dde26b3133d6128d0b8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Tue, 8 Oct 2019 00:30:38 +0200 Subject: [PATCH] soc/intel/skylake: move/rename files after drop of FSP 1.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Follow-up commit where only files are moved and paths adapted to make review of the previous commit easier. Change-Id: Iff1acbd286c2ba8e6613e866d4e2f893562e8973 Signed-off-by: Michael Niewöhner Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/35868 Reviewed-by: Michael Niewöhner Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/mainboard/intel/kunimitsu/Makefile.inc | 2 -- src/mainboard/intel/kunimitsu/{romstage_fsp20.c => romstage.c} | 0 src/soc/intel/skylake/Makefile.inc | 3 +-- src/soc/intel/skylake/{chip_fsp20.c => chip.c} | 0 src/soc/intel/skylake/include/{fsp20 => }/soc/ramstage.h | 2 +- src/soc/intel/skylake/include/{fsp20 => }/soc/romstage.h | 0 src/soc/intel/skylake/romstage/Makefile.inc | 2 +- .../intel/skylake/romstage/{romstage_fsp20.c => romstage.c} | 0 8 files changed, 3 insertions(+), 6 deletions(-) rename src/mainboard/intel/kunimitsu/{romstage_fsp20.c => romstage.c} (100%) rename src/soc/intel/skylake/{chip_fsp20.c => chip.c} (100%) rename src/soc/intel/skylake/include/{fsp20 => }/soc/ramstage.h (97%) rename src/soc/intel/skylake/include/{fsp20 => }/soc/romstage.h (100%) rename src/soc/intel/skylake/romstage/{romstage_fsp20.c => romstage.c} (100%) diff --git a/src/mainboard/intel/kunimitsu/Makefile.inc b/src/mainboard/intel/kunimitsu/Makefile.inc index 826c958c10..9a667d6a36 100644 --- a/src/mainboard/intel/kunimitsu/Makefile.inc +++ b/src/mainboard/intel/kunimitsu/Makefile.inc @@ -29,5 +29,3 @@ ramstage-y += mainboard.c ramstage-y += ramstage.c smm-y += smihandler.c - -romstage-srcs := $(subst $(MAINBOARDDIR)/romstage.c,$(MAINBOARDDIR)/romstage_fsp20.c,$(romstage-srcs)) diff --git a/src/mainboard/intel/kunimitsu/romstage_fsp20.c b/src/mainboard/intel/kunimitsu/romstage.c similarity index 100% rename from src/mainboard/intel/kunimitsu/romstage_fsp20.c rename to src/mainboard/intel/kunimitsu/romstage.c diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 8174765210..cb0906c1d5 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -42,7 +42,7 @@ romstage-y += spi.c romstage-y += uart.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c -ramstage-y += chip_fsp20.c +ramstage-y += chip.c ramstage-y += cpu.c ramstage-y += elog.c ramstage-y += finalize.c @@ -100,7 +100,6 @@ endif CPPFLAGS_common += -I$(src)/soc/intel/skylake CPPFLAGS_common += -I$(src)/soc/intel/skylake/include -CPPFLAGS_common += -I$(src)/soc/intel/skylake/include/fsp20 # Currently used for microcode path. CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(MAINBOARDDIR) diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip.c similarity index 100% rename from src/soc/intel/skylake/chip_fsp20.c rename to src/soc/intel/skylake/chip.c diff --git a/src/soc/intel/skylake/include/fsp20/soc/ramstage.h b/src/soc/intel/skylake/include/soc/ramstage.h similarity index 97% rename from src/soc/intel/skylake/include/fsp20/soc/ramstage.h rename to src/soc/intel/skylake/include/soc/ramstage.h index e5660a6f66..4157c4e09b 100644 --- a/src/soc/intel/skylake/include/fsp20/soc/ramstage.h +++ b/src/soc/intel/skylake/include/soc/ramstage.h @@ -21,7 +21,7 @@ #include #include -#include "../../../chip.h" +#include "../../chip.h" #define FSP_SIL_UPD FSP_S_CONFIG #define FSP_MEM_UPD FSP_M_CONFIG diff --git a/src/soc/intel/skylake/include/fsp20/soc/romstage.h b/src/soc/intel/skylake/include/soc/romstage.h similarity index 100% rename from src/soc/intel/skylake/include/fsp20/soc/romstage.h rename to src/soc/intel/skylake/include/soc/romstage.h diff --git a/src/soc/intel/skylake/romstage/Makefile.inc b/src/soc/intel/skylake/romstage/Makefile.inc index 7bd1c6fb97..dff89ce2dc 100644 --- a/src/soc/intel/skylake/romstage/Makefile.inc +++ b/src/soc/intel/skylake/romstage/Makefile.inc @@ -1,3 +1,3 @@ romstage-y += ../../../../cpu/intel/car/romstage.c -romstage-y += romstage_fsp20.c +romstage-y += romstage.c romstage-y += systemagent.c diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage.c similarity index 100% rename from src/soc/intel/skylake/romstage/romstage_fsp20.c rename to src/soc/intel/skylake/romstage/romstage.c