From 7f0a7f65e6704c3ce050edd79c257f010535a366 Mon Sep 17 00:00:00 2001 From: Seunghwan Kim Date: Mon, 29 Apr 2024 15:14:31 +0900 Subject: [PATCH] mb/google/brya/var/xol: Tune I2C5 timing parameters Update I2C5 timing parameter values to meet I2C bus spec. - fall_time_ns: 400 -> 200 BUG=None BRANCH=brya TEST=built and measure I2C5 timing parameters Before: tLOW : 1.88 us (spec >= 1.30) tHIGH: 0.57 us (spec >= 0.60) fSCL : 399.80 KHz After: tLOW : 1.60 us (spec >= 1.30) tHIGH: 0.97 us (spec >= 0.60) fSCL : 392.1 KHz Change-Id: I386b2765410fd10b8cd711f54478fb52428de5a3 Signed-off-by: Seunghwan Kim Reviewed-on: https://review.coreboot.org/c/coreboot/+/82100 Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai --- src/mainboard/google/brya/variants/xol/overridetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/brya/variants/xol/overridetree.cb b/src/mainboard/google/brya/variants/xol/overridetree.cb index 80d15feb62..6e054c5b0e 100644 --- a/src/mainboard/google/brya/variants/xol/overridetree.cb +++ b/src/mainboard/google/brya/variants/xol/overridetree.cb @@ -132,7 +132,7 @@ chip soc/intel/alderlake .i2c[5] = { .speed = I2C_SPEED_FAST, .rise_time_ns = 650, - .fall_time_ns = 400, + .fall_time_ns = 200, .data_hold_time_ns = 50, }, }"