soc/amd/*: Hook up device_operations in chipset.cb
This removes the need for a lot of boilerplate code in the soc code to hook up device_operations to devices. Change-Id: I2afc1855407910f1faa9bdd4e9416dd46474658e Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67738 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
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committed by
Felix Held
parent
bd15ece78a
commit
7f3807728b
@@ -12,14 +12,7 @@
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#include <types.h>
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#include "chip.h"
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/* Supplied by i2c.c */
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extern struct device_operations soc_amd_i2c_mmio_ops;
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/* Supplied by uart.c */
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extern struct device_operations cezanne_uart_mmio_ops;
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/* Supplied by emmc.c */
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extern struct device_operations cezanne_emmc_mmio_ops;
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struct device_operations cpu_bus_ops = {
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struct device_operations cezanne_cpu_bus_ops = {
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.init = mp_cpu_bus_init,
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@@ -39,50 +32,13 @@ static const char *soc_acpi_name(const struct device *dev)
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return NULL;
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};
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static struct device_operations pci_domain_ops = {
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struct device_operations cezanne_pci_domain_ops = {
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.read_resources = pci_domain_read_resources,
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.set_resources = pci_domain_set_resources,
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.scan_bus = pci_domain_scan_bus,
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.acpi_name = soc_acpi_name,
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};
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static void set_mmio_dev_ops(struct device *dev)
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{
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switch (dev->path.mmio.addr) {
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case APU_I2C0_BASE:
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case APU_I2C1_BASE:
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case APU_I2C2_BASE:
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case APU_I2C3_BASE:
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dev->ops = &soc_amd_i2c_mmio_ops;
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break;
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case APU_UART0_BASE:
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case APU_UART1_BASE:
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dev->ops = &cezanne_uart_mmio_ops;
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break;
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case APU_EMMC_BASE:
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dev->ops = &cezanne_emmc_mmio_ops;
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break;
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}
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}
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static void enable_dev(struct device *dev)
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{
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/* Set the operations if it is a special bus type */
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switch (dev->path.type) {
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case DEVICE_PATH_DOMAIN:
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dev->ops = &pci_domain_ops;
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break;
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case DEVICE_PATH_CPU_CLUSTER:
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dev->ops = &cpu_bus_ops;
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break;
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case DEVICE_PATH_MMIO:
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set_mmio_dev_ops(dev);
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break;
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default:
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break;
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}
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}
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static void soc_init(void *chip_info)
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{
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default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables;
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@@ -101,7 +57,6 @@ static void soc_final(void *chip_info)
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struct chip_operations soc_amd_cezanne_ops = {
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CHIP_NAME("AMD Cezanne SoC")
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.enable_dev = enable_dev,
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.init = soc_init,
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.final = soc_final
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};
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