From 7f4a637d96fbfc69dbddbd25badec362c808d0f2 Mon Sep 17 00:00:00 2001 From: Tim Crawford Date: Wed, 15 Feb 2023 15:43:05 -0700 Subject: [PATCH] mb/system76/rpl: oryp11: Configure CNVi reset It seems to be sufficient to just take the device out of reset, so configure it in coreboot instead of FSP. Change-Id: I408229072ba7eb169c3ba6693f95f5b32fca10e1 Signed-off-by: Tim Crawford --- src/mainboard/system76/rpl/variants/oryp11/gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/system76/rpl/variants/oryp11/gpio.c b/src/mainboard/system76/rpl/variants/oryp11/gpio.c index 8f79a2e077..1217d77319 100644 --- a/src/mainboard/system76/rpl/variants/oryp11/gpio.c +++ b/src/mainboard/system76/rpl/variants/oryp11/gpio.c @@ -94,7 +94,7 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_D2, NONE), PAD_CFG_GPO(GPP_D3, 0, DEEP), // GFX_DETECT_STRAP PAD_NC(GPP_D4, NONE), - // GPP_D5 (M.2_BT_PCMFRM_CRF_RST_N) configured by FSP + PAD_CFG_GPO(GPP_D5, 1, DEEP), // M.2_BT_PCMFRM_CRF_RST_N // GPP_D6 (M.2_BT_PCMOUT_CLKREQ0) configured by FSP PAD_NC(GPP_D7, NONE), // M.2_BT_PCMIN PAD_NC(GPP_D8, NONE), // M.2_BT_PCMCLK