sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

drivers/elog: Add elog_boot_notify()

Browse Source 
Change-Id: I898188d31fcfd153eb95d0a7324fa9fd85316e3c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35373
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Kyösti Mälkki
2019-09-11 17:12:26 +03:00
committed by Patrick Georgi
parent 2cce24dd4b
commit 7f50afb0c7
10 changed files with 16 additions and 25 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
src/northbridge/intel/nehalem/early_init.c
View File

@@ -139,8 +139,7 @@ void nehalem_early_initialization(int chipset_type)
s3_resume = (inw(DEFAULT_PMBASE + PM1_STS) & WAK_STS) &&
(((inl(DEFAULT_PMBASE + PM1_CNT) >> 10) & 7) == SLP_TYP_S3);
if (CONFIG(ELOG_BOOT_COUNT) && !s3_resume)
boot_count_increment();
elog_boot_notify(s3_resume);
/* Device Enable */
pci_write_config32(PCI_DEV(0, 0, 0), D0F0_DEVEN,

3
src/northbridge/intel/sandybridge/romstage.c
View File

@@ -74,8 +74,7 @@ void mainboard_romstage_entry(void)
s3resume = southbridge_detect_s3_resume();
if (CONFIG(ELOG_BOOT_COUNT) && !s3resume)
boot_count_increment();
elog_boot_notify(s3resume);
post_code(0x38);