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Fam15tn: Move SPD read from mainboards into wrapper

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Continuing with the mainboard cleanup for F15tn, move the functions
to read the SPD from the mainboards for Thatcher and Parmer into the
wrapper for the northbridge/amd/agesa/family15tn.

Move the SPD address customization for the mainboard into the
devicetree.cb file.

Unrelated side note - Porting.h has an un-closed #pragma pack(1)
that can cause confusing side-effects.  AGESA's structures all
use this, but coreboot's don't.  Be sure to include the coreboot
.h files BEFORE Porting.h is included, not after.

This fix has been tested.

Change-Id: I89cdd225be61f60c6b8e7020e6f8b879983bbd96
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/2190
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Siyuan Wang <wangsiyuanbuaa@gmail.com>
This commit is contained in:
Martin Roth
2013-01-20 10:38:58 -07:00
parent 50c0a50ac6
commit 7fb692bd86
16 changed files with 81 additions and 303 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
src/mainboard/amd/parmer/devicetree.cb
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@@ -51,16 +51,10 @@ chip northbridge/amd/agesa/family15tn/root_complex
device pci 13.2 on end # USB
device pci 14.0 on # SMBUS
chip drivers/generic/generic #dimm 0
device i2c 50 on end
device i2c 50 on end # 7-bit SPD address
end
chip drivers/generic/generic #dimm 1
device i2c 51 on end
end
chip drivers/generic/generic #dimm 0-1-0
device i2c 52 on end
end
chip drivers/generic/generic #dimm 0-1-1
device i2c 53 on end
device i2c 51 on end # 7-bit SPD address
end
end # SM
device pci 14.1 on end # IDE 0x439c
@@ -85,6 +79,12 @@ chip northbridge/amd/agesa/family15tn/root_complex
device pci 18.4 on end
device pci 18.5 on end
register "spdAddrLookup" = "
{
{ {0xA0, 0x00}, {0xA2, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
}"
end #chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
end #pci_domain
end #chip northbridge/amd/agesa/family15tn/root_complex