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soc/amd/picasso: add sd/emmc0 configuration to chip.h

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In order to isolate mainboard code from direct FSPS manipulation
allow sd/emmc0 configuration to be supplied by devicetree.cb.

BUG=b:153502861

Change-Id: I2569ccccd638faaf2c9ac68fe582ecb9fa967d9f
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2146439
Commit-Queue: Aaron Durbin <adurbin@google.com>
Tested-by: Aaron Durbin <adurbin@google.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40876
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Aaron Durbin
2020-04-11 10:06:37 -06:00
parent 00a220877c
commit 806ea463db
3 changed files with 82 additions and 0 deletions
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15
src/soc/amd/picasso/chip.h
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@@ -86,6 +86,21 @@ struct soc_amd_picasso_config {
enum spi100_speed spi_fast_speed;
enum spi100_speed spi_altio_speed;
enum spi100_speed spi_tpm_speed;
enum {
SD_EMMC_DISABLE,
SD_EMMC_SD_LOW_SPEED,
SD_EMMC_SD_HIGH_SPEED,
SD_EMMC_SD_UHS_I_SDR_50,
SD_EMMC_SD_UHS_I_DDR_50,
SD_EMMC_SD_UHS_I_SDR_104,
SD_EMMC_EMMC_SDR_26,
SD_EMMC_EMMC_SDR_52,
SD_EMMC_EMMC_DDR_52,
SD_EMMC_EMMC_HS200,
SD_EMMC_EMMC_HS400,
SD_EMMC_EMMC_HS300,
} sd_emmc_config;
};
typedef struct soc_amd_picasso_config config_t;