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Remove duplicated GX2 processor IIOC mode setting on CS5535 southbridge code

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and fix CIS mode comments.

Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6225 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Nils Jacobs
2010-12-30 19:23:29 +00:00
committed by Stefan Reinauer
parent 8cf54c9f23
commit 8098e42944
3 changed files with 5 additions and 12 deletions
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9
src/cpu/amd/model_gx2/cpureginit.c
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@@ -88,16 +88,13 @@ void cpuRegInit (void)
msr.lo = 0x00000603C;
wrmsr(msrnum, msr);
/* Only do this if we are building for 5535 */
/* FooGlue Setup */
#if 1
/* Enable CIS mode B in FooGlue */
msrnum = MSR_FG + 0x10;
/* Set CS5535/CS5536 mode in FooGlue */
msrnum = FG_GIO_MSR_SEL;
msr = rdmsr(msrnum);
msr.lo &= ~3;
msr.lo |= 2; /* ModeB */
msr.lo |= 2; /* IIOC mode CS5535/CS5536 enable. (according to Jordan Crouse the databook is wrong bits 1:0 have to be 2 instead of 1) */
wrmsr(msrnum, msr);
#endif
/* Disable DOT PLL. Graphics init will enable it if needed. */
msrnum = GLCP_DOTPLL;