From 809eb8d9e19c3db0fad7e5af1583b2cecd8cfd64 Mon Sep 17 00:00:00 2001 From: Tim Crawford Date: Fri, 17 Sep 2021 11:43:03 -0600 Subject: [PATCH] mb/system76/*: Enable dGPUs Change-Id: Ib5bab02801407c8bf05e6028bf8f9fa7ccc5ecd0 Signed-off-by: Tim Crawford --- src/mainboard/system76/addw1/Kconfig | 1 + src/mainboard/system76/addw1/Makefile.inc | 1 + .../system76/addw1/acpi/mainboard.asl | 3 ++ src/mainboard/system76/addw1/devicetree.cb | 7 ++++ src/mainboard/system76/addw1/romstage.c | 14 ++++++++ .../variants/addw1/include/variant/dgpu.h | 12 +++++++ .../variants/addw2/include/variant/dgpu.h | 12 +++++++ src/mainboard/system76/bonw14/Kconfig | 1 + src/mainboard/system76/bonw14/devicetree.cb | 10 +++--- src/mainboard/system76/galp5/Kconfig | 4 +++ src/mainboard/system76/galp5/acpi/dgpu.asl | 36 +++++++++++++++++++ .../system76/galp5/acpi/mainboard.asl | 2 ++ src/mainboard/system76/galp5/devicetree.cb | 7 ++++ src/mainboard/system76/galp5/gpio.h | 8 +++++ src/mainboard/system76/galp5/romstage.c | 17 +++++++++ src/mainboard/system76/gaze15/Kconfig | 1 + .../system76/gaze15/acpi/mainboard.asl | 3 ++ src/mainboard/system76/gaze15/devicetree.cb | 7 ++++ .../system76/gaze15/include/variant/gpio.h | 8 +++++ src/mainboard/system76/gaze15/romstage.c | 14 ++++++++ src/mainboard/system76/gaze16/Kconfig | 1 + src/mainboard/system76/gaze16/acpi/dgpu.asl | 36 +++++++++++++++++++ .../system76/gaze16/acpi/mainboard.asl | 2 ++ src/mainboard/system76/gaze16/romstage.c | 16 ++++++++- .../variants/3050/include/variant/gpio.h | 8 +++++ .../gaze16/variants/3050/overridetree.cb | 7 ++++ .../variants/3060/include/variant/gpio.h | 8 +++++ .../gaze16/variants/3060/overridetree.cb | 7 ++++ src/mainboard/system76/oryp5/Kconfig | 1 + .../system76/oryp5/acpi/mainboard.asl | 3 ++ src/mainboard/system76/oryp5/devicetree.cb | 7 ++++ .../system76/oryp5/include/mainboard/gpio.h | 8 +++++ src/mainboard/system76/oryp5/romstage.c | 14 ++++++++ src/mainboard/system76/oryp6/Kconfig | 1 + src/mainboard/system76/oryp6/Makefile.inc | 1 + .../system76/oryp6/acpi/mainboard.asl | 3 ++ src/mainboard/system76/oryp6/devicetree.cb | 7 ++++ src/mainboard/system76/oryp6/romstage.c | 14 ++++++++ .../variants/oryp6/include/variant/dgpu.h | 12 +++++++ .../variants/oryp7/include/variant/dgpu.h | 12 +++++++ src/mainboard/system76/oryp8/Kconfig | 1 + src/mainboard/system76/oryp8/acpi/dgpu.asl | 36 +++++++++++++++++++ .../system76/oryp8/acpi/mainboard.asl | 2 ++ src/mainboard/system76/oryp8/devicetree.cb | 7 ++++ .../system76/oryp8/include/mainboard/gpio.h | 8 +++++ src/mainboard/system76/oryp8/romstage.c | 14 ++++++++ 46 files changed, 399 insertions(+), 5 deletions(-) create mode 100644 src/mainboard/system76/addw1/variants/addw1/include/variant/dgpu.h create mode 100644 src/mainboard/system76/addw1/variants/addw2/include/variant/dgpu.h create mode 100644 src/mainboard/system76/galp5/acpi/dgpu.asl create mode 100644 src/mainboard/system76/gaze16/acpi/dgpu.asl create mode 100644 src/mainboard/system76/oryp6/variants/oryp6/include/variant/dgpu.h create mode 100644 src/mainboard/system76/oryp6/variants/oryp7/include/variant/dgpu.h create mode 100644 src/mainboard/system76/oryp8/acpi/dgpu.asl diff --git a/src/mainboard/system76/addw1/Kconfig b/src/mainboard/system76/addw1/Kconfig index 1c1a614ea8..c6417512bf 100644 --- a/src/mainboard/system76/addw1/Kconfig +++ b/src/mainboard/system76/addw1/Kconfig @@ -3,6 +3,7 @@ if BOARD_SYSTEM76_ADDW1 || BOARD_SYSTEM76_ADDW2 config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_16384 + select DRIVERS_GFX_NVIDIA select DRIVERS_I2C_HID select DRIVERS_I2C_TAS5825M select EC_SYSTEM76_EC diff --git a/src/mainboard/system76/addw1/Makefile.inc b/src/mainboard/system76/addw1/Makefile.inc index fedde68c13..c7d97c2b0a 100644 --- a/src/mainboard/system76/addw1/Makefile.inc +++ b/src/mainboard/system76/addw1/Makefile.inc @@ -1,4 +1,5 @@ CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include +CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include bootblock-y += bootblock.c bootblock-y += variants/$(VARIANT_DIR)/gpio_early.c diff --git a/src/mainboard/system76/addw1/acpi/mainboard.asl b/src/mainboard/system76/addw1/acpi/mainboard.asl index 4e67439c56..6660c16a24 100644 --- a/src/mainboard/system76/addw1/acpi/mainboard.asl +++ b/src/mainboard/system76/addw1/acpi/mainboard.asl @@ -1,5 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include +#include + #define EC_GPE_SCI 0x03 /* GPP_K3 */ #define EC_GPE_SWI 0x06 /* GPP_K6 */ #include diff --git a/src/mainboard/system76/addw1/devicetree.cb b/src/mainboard/system76/addw1/devicetree.cb index 00cc3b89e1..576cb415bd 100644 --- a/src/mainboard/system76/addw1/devicetree.cb +++ b/src/mainboard/system76/addw1/devicetree.cb @@ -58,6 +58,13 @@ chip soc/intel/cannonlake # PCI Express Graphics #0 x16, Clock 8 (NVIDIA GPU) register "PcieClkSrcUsage[8]" = "0x40" register "PcieClkSrcClkReq[8]" = "8" + + chip drivers/gfx/nvidia + device pci 00.0 on end # VGA controller + device pci 00.1 on end # Audio device + device pci 00.2 on end # USB xHCI Host controller + device pci 00.3 on end # USB Type-C UCSI controller + end end device pci 02.0 on end # Integrated Graphics Device device pci 04.0 on # SA Thermal device diff --git a/src/mainboard/system76/addw1/romstage.c b/src/mainboard/system76/addw1/romstage.c index b2b6e47ed4..34a198d0f5 100644 --- a/src/mainboard/system76/addw1/romstage.c +++ b/src/mainboard/system76/addw1/romstage.c @@ -1,7 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include +#include static const struct cnl_mb_cfg memcfg = { .spd[0] = { @@ -20,6 +22,18 @@ static const struct cnl_mb_cfg memcfg = { void mainboard_memory_init_params(FSPM_UPD *memupd) { + const struct nvidia_gpu_config config = { + .power_gpio = DGPU_PWR_EN, + .reset_gpio = DGPU_RST_N, + .enable = true, + }; + + // Enable dGPU power + nvidia_set_power(&config); + + // Set primary display to internal graphics + memupd->FspmConfig.PrimaryDisplay = 0; + // Allow higher memory speeds memupd->FspmConfig.SaOcSupport = 1; diff --git a/src/mainboard/system76/addw1/variants/addw1/include/variant/dgpu.h b/src/mainboard/system76/addw1/variants/addw1/include/variant/dgpu.h new file mode 100644 index 0000000000..94338a0ebd --- /dev/null +++ b/src/mainboard/system76/addw1/variants/addw1/include/variant/dgpu.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef VARIANT_DGPU_H +#define VARIANT_DGPU_H + +#include + +#define DGPU_RST_N GPP_F22 +#define DGPU_PWR_EN GPP_F23 +#define DGPU_GC6 GPP_C12 + +#endif diff --git a/src/mainboard/system76/addw1/variants/addw2/include/variant/dgpu.h b/src/mainboard/system76/addw1/variants/addw2/include/variant/dgpu.h new file mode 100644 index 0000000000..5e8c2b25f2 --- /dev/null +++ b/src/mainboard/system76/addw1/variants/addw2/include/variant/dgpu.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef VARIANT_DGPU_H +#define VARIANT_DGPU_H + +#include + +#define DGPU_RST_N GPP_F22 +#define DGPU_PWR_EN GPP_F23 +#define DGPU_GC6 GPP_K21 + +#endif diff --git a/src/mainboard/system76/bonw14/Kconfig b/src/mainboard/system76/bonw14/Kconfig index 37f0f505db..c5ad06cca8 100644 --- a/src/mainboard/system76/bonw14/Kconfig +++ b/src/mainboard/system76/bonw14/Kconfig @@ -3,6 +3,7 @@ if BOARD_SYSTEM76_BONW14 config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_16384 + select DRIVERS_GFX_NVIDIA select DRIVERS_I2C_HID select EC_SYSTEM76_EC select EC_SYSTEM76_EC_BAT_THRESHOLDS diff --git a/src/mainboard/system76/bonw14/devicetree.cb b/src/mainboard/system76/bonw14/devicetree.cb index 612711d91c..698690d1b7 100644 --- a/src/mainboard/system76/bonw14/devicetree.cb +++ b/src/mainboard/system76/bonw14/devicetree.cb @@ -62,10 +62,12 @@ chip soc/intel/cannonlake register "PcieClkSrcUsage[7]" = "0x40" register "PcieClkSrcClkReq[7]" = "7" - device pci 00.0 on end # VGA controller - device pci 00.1 on end # Audio device - device pci 00.2 on end # USB xHCI Host controller - device pci 00.3 on end # USB Type-C UCSI controller + chip drivers/gfx/nvidia + device pci 00.0 on end # VGA controller + device pci 00.1 on end # Audio device + device pci 00.2 on end # USB xHCI Host controller + device pci 00.3 on end # USB Type-C UCSI controller + end end # TODO: is this enough to disable iGPU? device pci 02.0 off end # Integrated Graphics Device diff --git a/src/mainboard/system76/galp5/Kconfig b/src/mainboard/system76/galp5/Kconfig index 534c25319f..403eae66f6 100644 --- a/src/mainboard/system76/galp5/Kconfig +++ b/src/mainboard/system76/galp5/Kconfig @@ -3,6 +3,7 @@ if BOARD_SYSTEM76_GALP5 config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_16384 + select DRIVERS_GFX_NVIDIA select DRIVERS_I2C_HID select DRIVERS_INTEL_PMC select DRIVERS_INTEL_USB4_RETIMER @@ -57,4 +58,7 @@ config UART_FOR_CONSOLE config USE_PM_ACPI_TIMER default n +config DRIVERS_GFX_NVIDIA_BRIDGE + default 0x1c + endif diff --git a/src/mainboard/system76/galp5/acpi/dgpu.asl b/src/mainboard/system76/galp5/acpi/dgpu.asl new file mode 100644 index 0000000000..baef2eaa7a --- /dev/null +++ b/src/mainboard/system76/galp5/acpi/dgpu.asl @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Scope (\_SB.PCI0.RP05) +{ + Device (DEV0) + { + Name(_ADR, 0x00000000) + + OperationRegion (PCIC, PCI_Config, 0x00, 0x50) + Field (PCIC, DwordAcc, NoLock, Preserve) + { + Offset (0x40), + SSID, 32 + } + + Name (_PR0, Package () { PWRR }) + Name (_PR3, Package () { PWRR }) + PowerResource (PWRR, 0, 0) + { + Name (_STA, 1) + + Method (_ON) + { + ^^SSID = 0x40181558 + Printf("GPU _ON %o", ToHexString(^^SSID)) + _STA = 1 + } + + Method (_OFF) + { + Printf("GPU _OFF %o", ToHexString(^^SSID)) + _STA = 0 + } + } + } +} diff --git a/src/mainboard/system76/galp5/acpi/mainboard.asl b/src/mainboard/system76/galp5/acpi/mainboard.asl index c982a9ee4c..aff8765c6e 100644 --- a/src/mainboard/system76/galp5/acpi/mainboard.asl +++ b/src/mainboard/system76/galp5/acpi/mainboard.asl @@ -1,5 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include "dgpu.asl" + #define EC_GPE_SCI 0x6E #define EC_GPE_SWI 0x6B #include diff --git a/src/mainboard/system76/galp5/devicetree.cb b/src/mainboard/system76/galp5/devicetree.cb index cf3a75e50f..75cb5c9d64 100644 --- a/src/mainboard/system76/galp5/devicetree.cb +++ b/src/mainboard/system76/galp5/devicetree.cb @@ -279,6 +279,13 @@ chip soc/intel/tigerlake register "srcclk_pin" = "2" # PEG_CLKREQ# device generic 0 on end end + + chip drivers/gfx/nvidia + device pci 00.0 on end # VGA controller + device pci 00.1 on end # Audio device + device pci 00.2 on end # USB xHCI Host controller + device pci 00.3 on end # USB Type-C UCSI controller + end end device ref pcie_rp9 on # PCIe root port #9 x1, Clock 3 (CARD) diff --git a/src/mainboard/system76/galp5/gpio.h b/src/mainboard/system76/galp5/gpio.h index b26956c700..9b0e028aed 100644 --- a/src/mainboard/system76/galp5/gpio.h +++ b/src/mainboard/system76/galp5/gpio.h @@ -5,6 +5,12 @@ #include +#define DGPU_RST_N GPP_U4 +#define DGPU_PWR_EN GPP_U5 +#define DGPU_GC6 GPP_D2 + +#ifndef __ACPI__ + static const struct pad_config early_gpio_table[] = { PAD_CFG_NF(GPP_C20, UP_20K, DEEP, NF1), // UART2_RXD PAD_CFG_NF(GPP_C21, UP_20K, DEEP, NF1), // UART2_TXD @@ -222,4 +228,6 @@ static const struct pad_config gpio_table[] = { //PAD_CFG_GPO(GPP_U5, 0, DEEP), // DGPU_PWR_EN }; +#endif /* __ACPI__ */ + #endif /* MAINBOARD_GPIO_H */ diff --git a/src/mainboard/system76/galp5/romstage.c b/src/mainboard/system76/galp5/romstage.c index a72b647d37..fc5ed362c3 100644 --- a/src/mainboard/system76/galp5/romstage.c +++ b/src/mainboard/system76/galp5/romstage.c @@ -1,5 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include "gpio.h" +#include #include #include #include @@ -18,5 +20,20 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) }; const bool half_populated = false; + const struct nvidia_gpu_config config = { + .power_gpio = DGPU_PWR_EN, + .reset_gpio = DGPU_RST_N, + .enable = true, + }; + + // Enable dGPU power + nvidia_set_power(&config); + + // Set primary display to internal graphics + mupd->FspmConfig.PrimaryDisplay = 0; + + // Allow memory clocks higher than 2933 MHz + mupd->FspmConfig.SaOcSupport = 1; + memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated); } diff --git a/src/mainboard/system76/gaze15/Kconfig b/src/mainboard/system76/gaze15/Kconfig index 6f84e86a48..3379828079 100644 --- a/src/mainboard/system76/gaze15/Kconfig +++ b/src/mainboard/system76/gaze15/Kconfig @@ -3,6 +3,7 @@ if BOARD_SYSTEM76_GAZE14 || BOARD_SYSTEM76_GAZE15 config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_16384 + select DRIVERS_GFX_NVIDIA select DRIVERS_I2C_HID select EC_SYSTEM76_EC select EC_SYSTEM76_EC_BAT_THRESHOLDS diff --git a/src/mainboard/system76/gaze15/acpi/mainboard.asl b/src/mainboard/system76/gaze15/acpi/mainboard.asl index b235437c25..3fbdb7328b 100644 --- a/src/mainboard/system76/gaze15/acpi/mainboard.asl +++ b/src/mainboard/system76/gaze15/acpi/mainboard.asl @@ -1,5 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include +#include + #define EC_GPE_SCI 0x03 /* GPP_K3 */ #define EC_GPE_SWI 0x06 /* GPP_K6 */ #include diff --git a/src/mainboard/system76/gaze15/devicetree.cb b/src/mainboard/system76/gaze15/devicetree.cb index cf0965b3d5..46c20fae99 100644 --- a/src/mainboard/system76/gaze15/devicetree.cb +++ b/src/mainboard/system76/gaze15/devicetree.cb @@ -57,6 +57,13 @@ chip soc/intel/cannonlake # PCI Express Graphics #0 x16, Clock 8 (NVIDIA GPU) register "PcieClkSrcUsage[8]" = "0x40" register "PcieClkSrcClkReq[8]" = "8" + + chip drivers/gfx/nvidia + device pci 00.0 on end # VGA controller + device pci 00.1 on end # Audio device + device pci 00.2 on end # USB xHCI Host controller + device pci 00.3 on end # USB Type-C UCSI controller + end end device pci 02.0 on # Integrated Graphics Device register "gfx" = "GMA_DEFAULT_PANEL(0)" diff --git a/src/mainboard/system76/gaze15/include/variant/gpio.h b/src/mainboard/system76/gaze15/include/variant/gpio.h index 95d576294f..46e36348ba 100644 --- a/src/mainboard/system76/gaze15/include/variant/gpio.h +++ b/src/mainboard/system76/gaze15/include/variant/gpio.h @@ -3,7 +3,15 @@ #ifndef VARIANT_GPIO_H #define VARIANT_GPIO_H +#include + +#define DGPU_RST_N GPP_F22 +#define DGPU_PWR_EN GPP_F23 +#define DGPU_GC6 GPP_K21 + +#ifndef __ACPI__ void variant_configure_early_gpios(void); void variant_configure_gpios(void); +#endif #endif diff --git a/src/mainboard/system76/gaze15/romstage.c b/src/mainboard/system76/gaze15/romstage.c index 02634ba2ad..fdb208b88d 100644 --- a/src/mainboard/system76/gaze15/romstage.c +++ b/src/mainboard/system76/gaze15/romstage.c @@ -1,7 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include +#include static const struct cnl_mb_cfg memcfg = { .spd[0] = { @@ -20,5 +22,17 @@ static const struct cnl_mb_cfg memcfg = { void mainboard_memory_init_params(FSPM_UPD *memupd) { + const struct nvidia_gpu_config config = { + .power_gpio = DGPU_PWR_EN, + .reset_gpio = DGPU_RST_N, + .enable = true, + }; + + // Enable dGPU power + nvidia_set_power(&config); + + // Set primary display to internal graphics + memupd->FspmConfig.PrimaryDisplay = 0; + cannonlake_memcfg_init(&memupd->FspmConfig, &memcfg); } diff --git a/src/mainboard/system76/gaze16/Kconfig b/src/mainboard/system76/gaze16/Kconfig index 16b40b1550..bd7a9f36a5 100644 --- a/src/mainboard/system76/gaze16/Kconfig +++ b/src/mainboard/system76/gaze16/Kconfig @@ -3,6 +3,7 @@ if BOARD_SYSTEM76_GAZE16_3050 || BOARD_SYSTEM76_GAZE16_3060 || BOARD_SYSTEM76_GA config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_16384 + select DRIVERS_GFX_NVIDIA select DRIVERS_I2C_HID select EC_SYSTEM76_EC select EC_SYSTEM76_EC_BAT_THRESHOLDS diff --git a/src/mainboard/system76/gaze16/acpi/dgpu.asl b/src/mainboard/system76/gaze16/acpi/dgpu.asl new file mode 100644 index 0000000000..6a7b79405c --- /dev/null +++ b/src/mainboard/system76/gaze16/acpi/dgpu.asl @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Scope (\_SB.PCI0.PEG1) +{ + Device (DEV0) + { + Name(_ADR, 0x00000000) + + OperationRegion (PCIC, PCI_Config, 0x00, 0x50) + Field (PCIC, DwordAcc, NoLock, Preserve) + { + Offset (0x40), + SSID, 32 + } + + Name (_PR0, Package () { PWRR }) + Name (_PR3, Package () { PWRR }) + PowerResource (PWRR, 0, 0) + { + Name (_STA, 1) + + Method (_ON) + { + ^^SSID = 0x40181558 + Printf("GPU _ON %o", ToHexString(^^SSID)) + _STA = 1 + } + + Method (_OFF) + { + Printf("GPU _OFF %o", ToHexString(^^SSID)) + _STA = 0 + } + } + } +} diff --git a/src/mainboard/system76/gaze16/acpi/mainboard.asl b/src/mainboard/system76/gaze16/acpi/mainboard.asl index c982a9ee4c..aff8765c6e 100644 --- a/src/mainboard/system76/gaze16/acpi/mainboard.asl +++ b/src/mainboard/system76/gaze16/acpi/mainboard.asl @@ -1,5 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include "dgpu.asl" + #define EC_GPE_SCI 0x6E #define EC_GPE_SWI 0x6B #include diff --git a/src/mainboard/system76/gaze16/romstage.c b/src/mainboard/system76/gaze16/romstage.c index f46e83c656..55460d68f0 100644 --- a/src/mainboard/system76/gaze16/romstage.c +++ b/src/mainboard/system76/gaze16/romstage.c @@ -1,8 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include #include +#include #include "variant.h" static const struct mb_cfg board_cfg = { @@ -22,9 +24,21 @@ static const struct mem_spd spd_info = { void mainboard_memory_init_params(FSPM_UPD *mupd) { + const bool half_populated = false; + + const struct nvidia_gpu_config config = { + .power_gpio = DGPU_PWR_EN, + .reset_gpio = DGPU_RST_N, + .enable = true, + }; + variant_memory_init_params(mupd); - const bool half_populated = false; + // Enable dGPU power + nvidia_set_power(&config); + + // Set primary display to internal graphics + mupd->FspmConfig.PrimaryDisplay = 0; memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated); } diff --git a/src/mainboard/system76/gaze16/variants/3050/include/variant/gpio.h b/src/mainboard/system76/gaze16/variants/3050/include/variant/gpio.h index a5e9b17f95..d520217cc4 100644 --- a/src/mainboard/system76/gaze16/variants/3050/include/variant/gpio.h +++ b/src/mainboard/system76/gaze16/variants/3050/include/variant/gpio.h @@ -5,6 +5,12 @@ #include +#define DGPU_RST_N GPP_F8 +#define DGPU_PWR_EN GPP_F9 +#define DGPU_GC6 GPP_K11 + +#ifndef __ACPI__ + static const struct pad_config early_gpio_table[] = { PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), // UART2_RXD PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), // UART2_TXD @@ -285,4 +291,6 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI(GPP_S7, NONE, DEEP), // DMIC_DAT_PCH }; +#endif /* __ACPI__ */ + #endif /* VARIANT_GPIO_H */ diff --git a/src/mainboard/system76/gaze16/variants/3050/overridetree.cb b/src/mainboard/system76/gaze16/variants/3050/overridetree.cb index 73520b5dc8..c474f02ba9 100644 --- a/src/mainboard/system76/gaze16/variants/3050/overridetree.cb +++ b/src/mainboard/system76/gaze16/variants/3050/overridetree.cb @@ -17,6 +17,13 @@ chip soc/intel/tigerlake register "srcclk_pin" = "-1" # GFX_CLKREQ0# device generic 0 on end end + + chip drivers/gfx/nvidia + device pci 00.0 on end # VGA controller + device pci 00.1 on end # Audio device + device pci 00.2 on end # USB xHCI Host controller + device pci 00.3 on end # USB Type-C UCSI controller + end end device ref peg0 on # PCIe PEG0 x4, Clock 4 (SSD2) diff --git a/src/mainboard/system76/gaze16/variants/3060/include/variant/gpio.h b/src/mainboard/system76/gaze16/variants/3060/include/variant/gpio.h index f1d2cdabf5..b15131fd33 100644 --- a/src/mainboard/system76/gaze16/variants/3060/include/variant/gpio.h +++ b/src/mainboard/system76/gaze16/variants/3060/include/variant/gpio.h @@ -5,6 +5,12 @@ #include +#define DGPU_RST_N GPP_F8 +#define DGPU_PWR_EN GPP_F9 +#define DGPU_GC6 GPP_K11 + +#ifndef __ACPI__ + static const struct pad_config early_gpio_table[] = { PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), // UART2_RXD PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), // UART2_TXD @@ -285,4 +291,6 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI(GPP_S7, NONE, DEEP), // MIC_DATA_PCH }; +#endif /* __ACPI__ */ + #endif /* VARIANT_GPIO_H */ diff --git a/src/mainboard/system76/gaze16/variants/3060/overridetree.cb b/src/mainboard/system76/gaze16/variants/3060/overridetree.cb index 044df55457..b1bc81a2db 100644 --- a/src/mainboard/system76/gaze16/variants/3060/overridetree.cb +++ b/src/mainboard/system76/gaze16/variants/3060/overridetree.cb @@ -17,6 +17,13 @@ chip soc/intel/tigerlake register "srcclk_pin" = "-1" # PEG_CLKREQ# device generic 0 on end end + + chip drivers/gfx/nvidia + device pci 00.0 on end # VGA controller + device pci 00.1 on end # Audio device + device pci 00.2 on end # USB xHCI Host controller + device pci 00.3 on end # USB Type-C UCSI controller + end end device ref peg0 on # PCIe PEG0 x4, Clock 7 (SSD1) diff --git a/src/mainboard/system76/oryp5/Kconfig b/src/mainboard/system76/oryp5/Kconfig index 317e29b988..043608f77a 100644 --- a/src/mainboard/system76/oryp5/Kconfig +++ b/src/mainboard/system76/oryp5/Kconfig @@ -3,6 +3,7 @@ if BOARD_SYSTEM76_ORYP5 config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_16384 + select DRIVERS_GFX_NVIDIA select DRIVERS_I2C_HID select DRIVERS_I2C_TAS5825M select EC_SYSTEM76_EC diff --git a/src/mainboard/system76/oryp5/acpi/mainboard.asl b/src/mainboard/system76/oryp5/acpi/mainboard.asl index 17d2221ab4..46ed658aa8 100644 --- a/src/mainboard/system76/oryp5/acpi/mainboard.asl +++ b/src/mainboard/system76/oryp5/acpi/mainboard.asl @@ -1,5 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include +#include + #define EC_GPE_SCI 0x17 /* GPP_B23 */ #define EC_GPE_SWI 0x26 /* GPP_G6 */ #include diff --git a/src/mainboard/system76/oryp5/devicetree.cb b/src/mainboard/system76/oryp5/devicetree.cb index b55cbbe828..95c8d92395 100644 --- a/src/mainboard/system76/oryp5/devicetree.cb +++ b/src/mainboard/system76/oryp5/devicetree.cb @@ -65,6 +65,13 @@ chip soc/intel/cannonlake # PCI Express Graphics #0 x16, Clock 8 (NVIDIA GPU) register "PcieClkSrcUsage[8]" = "0x40" register "PcieClkSrcClkReq[8]" = "8" + + chip drivers/gfx/nvidia + device pci 00.0 on end # VGA controller + device pci 00.1 on end # Audio device + device pci 00.2 on end # USB xHCI Host controller + device pci 00.3 on end # USB Type-C UCSI controller + end end device pci 02.0 on # Integrated Graphics Device register "gfx" = "GMA_DEFAULT_PANEL(0)" diff --git a/src/mainboard/system76/oryp5/include/mainboard/gpio.h b/src/mainboard/system76/oryp5/include/mainboard/gpio.h index c6393beebb..9575863ef0 100644 --- a/src/mainboard/system76/oryp5/include/mainboard/gpio.h +++ b/src/mainboard/system76/oryp5/include/mainboard/gpio.h @@ -3,7 +3,15 @@ #ifndef MAINBOARD_GPIO_H #define MAINBOARD_GPIO_H +#include + +#define DGPU_RST_N GPP_F22 +#define DGPU_PWR_EN GPP_F23 +#define DGPU_GC6 GPP_C12 + +#ifndef __ACPI__ void mainboard_configure_early_gpios(void); void mainboard_configure_gpios(void); +#endif #endif diff --git a/src/mainboard/system76/oryp5/romstage.c b/src/mainboard/system76/oryp5/romstage.c index 455a2bb919..ec24f532b2 100644 --- a/src/mainboard/system76/oryp5/romstage.c +++ b/src/mainboard/system76/oryp5/romstage.c @@ -1,5 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include +#include #include #include @@ -20,6 +22,18 @@ static const struct cnl_mb_cfg memcfg = { void mainboard_memory_init_params(FSPM_UPD *memupd) { + const struct nvidia_gpu_config config = { + .power_gpio = DGPU_PWR_EN, + .reset_gpio = DGPU_RST_N, + .enable = true, + }; + + // Enable dGPU power + nvidia_set_power(&config); + + // Set primary display to internal graphics + memupd->FspmConfig.PrimaryDisplay = 0; + // Allow memory speeds higher than 2666 MT/s memupd->FspmConfig.SaOcSupport = 1; diff --git a/src/mainboard/system76/oryp6/Kconfig b/src/mainboard/system76/oryp6/Kconfig index 326c4b19d4..c235fa84a4 100644 --- a/src/mainboard/system76/oryp6/Kconfig +++ b/src/mainboard/system76/oryp6/Kconfig @@ -3,6 +3,7 @@ if BOARD_SYSTEM76_ORYP6 || BOARD_SYSTEM76_ORYP7 config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_16384 + select DRIVERS_GFX_NVIDIA select DRIVERS_I2C_HID select DRIVERS_I2C_TAS5825M select EC_SYSTEM76_EC diff --git a/src/mainboard/system76/oryp6/Makefile.inc b/src/mainboard/system76/oryp6/Makefile.inc index 2267eb6f9f..08f954dd03 100644 --- a/src/mainboard/system76/oryp6/Makefile.inc +++ b/src/mainboard/system76/oryp6/Makefile.inc @@ -1,4 +1,5 @@ CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include +CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include bootblock-y += bootblock.c bootblock-y += variants/$(VARIANT_DIR)/gpio_early.c diff --git a/src/mainboard/system76/oryp6/acpi/mainboard.asl b/src/mainboard/system76/oryp6/acpi/mainboard.asl index b235437c25..bc0d7c7bf6 100644 --- a/src/mainboard/system76/oryp6/acpi/mainboard.asl +++ b/src/mainboard/system76/oryp6/acpi/mainboard.asl @@ -1,5 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include +#include + #define EC_GPE_SCI 0x03 /* GPP_K3 */ #define EC_GPE_SWI 0x06 /* GPP_K6 */ #include diff --git a/src/mainboard/system76/oryp6/devicetree.cb b/src/mainboard/system76/oryp6/devicetree.cb index 8fc274b4e7..0de6155928 100644 --- a/src/mainboard/system76/oryp6/devicetree.cb +++ b/src/mainboard/system76/oryp6/devicetree.cb @@ -62,6 +62,13 @@ chip soc/intel/cannonlake # PCI Express Graphics #0 x16, Clock 8 (NVIDIA GPU) register "PcieClkSrcUsage[8]" = "0x40" register "PcieClkSrcClkReq[8]" = "8" + + chip drivers/gfx/nvidia + device pci 00.0 on end # VGA controller + device pci 00.1 on end # Audio device + device pci 00.2 on end # USB xHCI Host controller + device pci 00.3 on end # USB Type-C UCSI controller + end end device pci 02.0 on # Integrated Graphics Device register "gfx" = "GMA_DEFAULT_PANEL(0)" diff --git a/src/mainboard/system76/oryp6/romstage.c b/src/mainboard/system76/oryp6/romstage.c index 8ea791a2d1..ecfe87ce3b 100644 --- a/src/mainboard/system76/oryp6/romstage.c +++ b/src/mainboard/system76/oryp6/romstage.c @@ -1,7 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include +#include #include static const struct cnl_mb_cfg memcfg = { @@ -21,6 +23,18 @@ static const struct cnl_mb_cfg memcfg = { void mainboard_memory_init_params(FSPM_UPD *memupd) { + const struct nvidia_gpu_config config = { + .power_gpio = DGPU_PWR_EN, + .reset_gpio = DGPU_RST_N, + .enable = true, + }; + + // Enable dGPU power + nvidia_set_power(&config); + + // Set primary display to internal graphics + memupd->FspmConfig.PrimaryDisplay = 0; + variant_configure_fspm(memupd); cannonlake_memcfg_init(&memupd->FspmConfig, &memcfg); diff --git a/src/mainboard/system76/oryp6/variants/oryp6/include/variant/dgpu.h b/src/mainboard/system76/oryp6/variants/oryp6/include/variant/dgpu.h new file mode 100644 index 0000000000..5e8c2b25f2 --- /dev/null +++ b/src/mainboard/system76/oryp6/variants/oryp6/include/variant/dgpu.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef VARIANT_DGPU_H +#define VARIANT_DGPU_H + +#include + +#define DGPU_RST_N GPP_F22 +#define DGPU_PWR_EN GPP_F23 +#define DGPU_GC6 GPP_K21 + +#endif diff --git a/src/mainboard/system76/oryp6/variants/oryp7/include/variant/dgpu.h b/src/mainboard/system76/oryp6/variants/oryp7/include/variant/dgpu.h new file mode 100644 index 0000000000..5e8c2b25f2 --- /dev/null +++ b/src/mainboard/system76/oryp6/variants/oryp7/include/variant/dgpu.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef VARIANT_DGPU_H +#define VARIANT_DGPU_H + +#include + +#define DGPU_RST_N GPP_F22 +#define DGPU_PWR_EN GPP_F23 +#define DGPU_GC6 GPP_K21 + +#endif diff --git a/src/mainboard/system76/oryp8/Kconfig b/src/mainboard/system76/oryp8/Kconfig index 6c9ff4e5eb..94b2ad4453 100644 --- a/src/mainboard/system76/oryp8/Kconfig +++ b/src/mainboard/system76/oryp8/Kconfig @@ -3,6 +3,7 @@ if BOARD_SYSTEM76_ORYP8 config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_16384 + select DRIVERS_GFX_NVIDIA select DRIVERS_I2C_HID select DRIVERS_I2C_TAS5825M select EC_SYSTEM76_EC diff --git a/src/mainboard/system76/oryp8/acpi/dgpu.asl b/src/mainboard/system76/oryp8/acpi/dgpu.asl new file mode 100644 index 0000000000..6a7b79405c --- /dev/null +++ b/src/mainboard/system76/oryp8/acpi/dgpu.asl @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Scope (\_SB.PCI0.PEG1) +{ + Device (DEV0) + { + Name(_ADR, 0x00000000) + + OperationRegion (PCIC, PCI_Config, 0x00, 0x50) + Field (PCIC, DwordAcc, NoLock, Preserve) + { + Offset (0x40), + SSID, 32 + } + + Name (_PR0, Package () { PWRR }) + Name (_PR3, Package () { PWRR }) + PowerResource (PWRR, 0, 0) + { + Name (_STA, 1) + + Method (_ON) + { + ^^SSID = 0x40181558 + Printf("GPU _ON %o", ToHexString(^^SSID)) + _STA = 1 + } + + Method (_OFF) + { + Printf("GPU _OFF %o", ToHexString(^^SSID)) + _STA = 0 + } + } + } +} diff --git a/src/mainboard/system76/oryp8/acpi/mainboard.asl b/src/mainboard/system76/oryp8/acpi/mainboard.asl index c982a9ee4c..aff8765c6e 100644 --- a/src/mainboard/system76/oryp8/acpi/mainboard.asl +++ b/src/mainboard/system76/oryp8/acpi/mainboard.asl @@ -1,5 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include "dgpu.asl" + #define EC_GPE_SCI 0x6E #define EC_GPE_SWI 0x6B #include diff --git a/src/mainboard/system76/oryp8/devicetree.cb b/src/mainboard/system76/oryp8/devicetree.cb index cd2e617a3c..f351e37784 100644 --- a/src/mainboard/system76/oryp8/devicetree.cb +++ b/src/mainboard/system76/oryp8/devicetree.cb @@ -103,6 +103,13 @@ chip soc/intel/tigerlake register "srcclk_pin" = "-1" # PEG_CLKREQ# device generic 0 on end end + + chip drivers/gfx/nvidia + device pci 00.0 on end # VGA controller + device pci 00.1 on end # Audio device + device pci 00.2 on end # USB xHCI Host controller + device pci 00.3 on end # USB Type-C UCSI controller + end end device ref igpu on # DDIA is eDP diff --git a/src/mainboard/system76/oryp8/include/mainboard/gpio.h b/src/mainboard/system76/oryp8/include/mainboard/gpio.h index c6393beebb..b6e0f37648 100644 --- a/src/mainboard/system76/oryp8/include/mainboard/gpio.h +++ b/src/mainboard/system76/oryp8/include/mainboard/gpio.h @@ -3,7 +3,15 @@ #ifndef MAINBOARD_GPIO_H #define MAINBOARD_GPIO_H +#include + +#define DGPU_RST_N GPP_F8 +#define DGPU_PWR_EN GPP_F9 +#define DGPU_GC6 GPP_K11 + +#ifndef __ACPI__ void mainboard_configure_early_gpios(void); void mainboard_configure_gpios(void); +#endif #endif diff --git a/src/mainboard/system76/oryp8/romstage.c b/src/mainboard/system76/oryp8/romstage.c index affe6369cc..d9f6c7fd84 100644 --- a/src/mainboard/system76/oryp8/romstage.c +++ b/src/mainboard/system76/oryp8/romstage.c @@ -1,5 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include +#include #include #include #include @@ -23,6 +25,18 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) { const bool half_populated = false; + const struct nvidia_gpu_config config = { + .power_gpio = DGPU_PWR_EN, + .reset_gpio = DGPU_RST_N, + .enable = true, + }; + + // Enable dGPU power + nvidia_set_power(&config); + + // Set primary display to internal graphics + mupd->FspmConfig.PrimaryDisplay = 0; + // Enable M.2 PCIE 4.0 and PEG1 mupd->FspmConfig.CpuPcieRpEnableMask = 0x3;