soc/intel/apollolake: clarify Fast SPI CS2 pad configuration

The pad for CS2 of the Fast SPI interface needs to be configured for
automatic MMIO translation when a SPI TPM is utilized. Instead of
unconditionally configuring that pad under LPC_TPM provide a explicit
Kconfig for a mainboard to select.

Change-Id: Ia94b90e12d71a4b849359188a853f7e036cc583b
Signed-off-by: Aaron Durbin <adurbin@chormium.org>
Reviewed-on: https://review.coreboot.org/14531
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Aaron Durbin
2016-04-27 23:05:52 -05:00
parent 588ccaa9a7
commit 80a3df2607
3 changed files with 10 additions and 1 deletions

View File

@@ -41,6 +41,14 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_HARD_RESET
select SOC_INTEL_COMMON
config TPM_ON_FAST_SPI
bool
default n
select LPC_TPM
help
TPM part is conntected on Fast SPI interface, but the LPC MMIO
TPM transactions are decoded and serialized over the SPI interface.
config SOC_INTEL_COMMON_RESET
bool
default y