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ironlake: Fix compilation on x86_64

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Use correct datasize to compile on x86_64.
Tested on Lenovo T410 with additional x86_64 patches.

Change-Id: I213b2b1c5de174b5c14b67d1b437d19c656d13fd
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37371
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Patrick Rudolph
2019-11-29 19:27:37 +01:00
parent a32df26ec0
commit 819c206742
7 changed files with 9 additions and 8 deletions
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4
src/northbridge/intel/ironlake/raminit.c
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@@ -1941,7 +1941,7 @@ static void flush_cache(u32 start, u32 size)
end = start + (ALIGN_DOWN(size + 4096, 4096));
for (addr = start; addr < end; addr += 64)
clflush((void *)addr);
clflush((void *)(uintptr_t)addr);
}
static void clear_errors(void)
@@ -1956,7 +1956,7 @@ static void write_testing(struct raminfo *info, int totalrank, int flip)
u32 offset;
u8 *base;
base = (u8 *)(totalrank << 28);
base = (u8 *)(uintptr_t)(totalrank << 28);
for (offset = 0; offset < 9 * 480; offset += 2) {
write32(base + offset * 8, get_etalon2(flip, offset));
write32(base + offset * 8 + 4, get_etalon2(flip, offset));