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cpu/amd/agesa: Remove leftover code

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Now that all agesa CPUs are removed this code is unused.

Change-Id: If0c082bbdb09457e3876962fa75725add11cb67c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69118
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Arthur Heymans
2022-11-01 23:33:45 +01:00
parent 0f12381083
commit 81a4fefce2
14 changed files with 16 additions and 179 deletions
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34
src/vendorcode/amd/Kconfig
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@ -1,42 +1,10 @@
# SPDX-License-Identifier: GPL-2.0-only
if CPU_AMD_AGESA || CPU_AMD_PI || SOC_AMD_PI
if CPU_AMD_PI || SOC_AMD_PI
menu "AMD Platform Initialization"
choice
prompt "AGESA source"
default CPU_AMD_AGESA_BINARY_PI if CPU_AMD_PI
default CPU_AMD_AGESA_BINARY_PI if SOC_AMD_PI
default CPU_AMD_AGESA_OPENSOURCE if CPU_AMD_AGESA
help
Select the method for including the AMD Platform Initialization
code into coreboot. Platform Initialization code is required for
all AMD processors.
config CPU_AMD_AGESA_BINARY_PI
bool "binary PI"
help
Use a binary PI package. Generally, these will be stored in the
"3rdparty/blobs" directory. For some processors, these must be obtained
directly from AMD Embedded Processors Group
(http://www.amd.com/embedded).
config CPU_AMD_AGESA_OPENSOURCE
bool "open-source AGESA"
help
Build the PI package ("AGESA") from source code in the "vendorcode"
directory.
endchoice
if CPU_AMD_AGESA_OPENSOURCE
source "src/vendorcode/amd/agesa/Kconfig"
endif
if CPU_AMD_AGESA_BINARY_PI
source "src/vendorcode/amd/pi/Kconfig"
endif
config AGESA_EXTRA_TIMESTAMPS
bool "Add instrumentation for AGESA calls"

8
src/vendorcode/amd/pi/00670F00/Makefile.inc
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@ -85,7 +85,7 @@ agesa_raw_files += $(wildcard $(AGESA_ROOT)/Lib/*.[cS])
agesa_raw_files += $(wildcard $(AGESA_ROOT)/binaryPI/*.[cS])
classes-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += libagesa
classes-y += libagesa
ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y)
$(eval $(call create_class_compiler,libagesa,x86_32))
@ -136,7 +136,7 @@ $(AGESA_POST_MEM_ELF): $(AGESA_POST_MEM_INPUT_ELF)
$(AGESA_POST_MEM_ELF_RMOD): $(AGESA_POST_MEM_ELF)
cbfs-files-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += $(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)
cbfs-files-y += $(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)
$(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-file := $(CONFIG_AGESA_PRE_MEMORY_BINARY_PI_FILE)
$(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-type := stage
$(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-options := --xip
@ -144,7 +144,7 @@ $(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-options := --xip
# 64 byte alignment.
$(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-align := 4096
cbfs-files-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += $(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)
cbfs-files-y += $(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)
$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-file := $(AGESA_POST_MEM_ELF_RMOD)
$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-type := stage
$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-compression := $(CBFS_COMPRESS_FLAG)
@ -158,7 +158,7 @@ ifeq ($(AGESA_BINARYPI_INPUT_FILE),)
files_added:: warn_no_agesa
else
cbfs-files-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += $(CONFIG_AGESA_CBFS_NAME)
cbfs-files-y += $(CONFIG_AGESA_CBFS_NAME)
$(CONFIG_AGESA_CBFS_NAME)-file := $(AGESA_BINARYPI_INPUT_FILE)
ifeq ($(CONFIG_AGESA_BINARY_PI_AS_STAGE),y)

4
src/vendorcode/amd/pi/Makefile.inc
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@ -108,7 +108,7 @@ ifeq ($(CONFIG_HUDSON_IMC_FWM),y)
agesa_raw_files += $(wildcard $(src)/vendorcode/amd/pi/Lib/imc/*.c)
endif
classes-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += libagesa
classes-y += libagesa
ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y)
$(eval $(call create_class_compiler,libagesa,x86_32))
@ -135,7 +135,7 @@ ramstage-libs += $(agesa_output_path)/libagesa.a
#######################################################################
cbfs-files-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += $(CONFIG_AGESA_CBFS_NAME)
cbfs-files-y += $(CONFIG_AGESA_CBFS_NAME)
$(CONFIG_AGESA_CBFS_NAME)-file := $(CONFIG_AGESA_BINARY_PI_FILE)
$(CONFIG_AGESA_CBFS_NAME)-type := raw
$(CONFIG_AGESA_CBFS_NAME)-position := $(CONFIG_AGESA_BINARY_PI_LOCATION)