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mb/asrock/b85m_pro4: Properly select muxed functions

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The old values were completely out of whack. Use the same settings as
vendor firmware. The SUPERIO_NUVOTON_NCT6776_COM_A option overwrites
configured settings, so drop it from Kconfig to prevent conflicts.

Change-Id: I9743741518adc153d594ccae65298c7dcc8a88d1
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42403
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Angel Pons
2020-06-15 23:51:54 +02:00
parent 03f0e43a3c
commit 822b267a8c
2 changed files with 7 additions and 4 deletions
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1
src/mainboard/asrock/b85m_pro4/Kconfig
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@@ -16,7 +16,6 @@ config BOARD_SPECIFIC_OPTIONS
select SERIRQ_CONTINUOUS_MODE select SERIRQ_CONTINUOUS_MODE
select SOUTHBRIDGE_INTEL_LYNXPOINT select SOUTHBRIDGE_INTEL_LYNXPOINT
select SUPERIO_NUVOTON_NCT6776 select SUPERIO_NUVOTON_NCT6776
select SUPERIO_NUVOTON_NCT6776_COM_A
config MAINBOARD_DIR config MAINBOARD_DIR
string string

10
src/mainboard/asrock/b85m_pro4/bootblock.c
View File

@@ -13,9 +13,13 @@ void mainboard_config_superio(void)
{ {
nuvoton_pnp_enter_conf_state(GLOBAL_DEV); nuvoton_pnp_enter_conf_state(GLOBAL_DEV);
/* Select HWM/LED functions instead of floppy functions */ /* Select SIO pin mux states */
pnp_write_config(GLOBAL_DEV, 0x1c, 0x03); pnp_write_config(GLOBAL_DEV, 0x1b, 0x68);
pnp_write_config(GLOBAL_DEV, 0x24, 0x24); pnp_write_config(GLOBAL_DEV, 0x1c, 0x80);
pnp_write_config(GLOBAL_DEV, 0x24, 0x1c);
pnp_write_config(GLOBAL_DEV, 0x27, 0xd0);
pnp_write_config(GLOBAL_DEV, 0x2a, 0x62);
pnp_write_config(GLOBAL_DEV, 0x2f, 0x03);
/* Power RAM in S3 and let the PCH handle power failure actions */ /* Power RAM in S3 and let the PCH handle power failure actions */
pnp_set_logical_device(ACPI_DEV); pnp_set_logical_device(ACPI_DEV);