more chip stuff

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/devices/Config.lb

@@ -1,3 +1,4 @@
 object device.o
 object device_util.o
 object pci_device.o
+object chip.o

src/devices/chip.c

@@ -10,6 +10,15 @@
 void
 chip_configure(struct chip *root, enum chip_pass pass)
 {
-	while (root) {
+	struct chip *c;
+
+	for (c = root; c; c = c->next) {
+		if (root->control && root->control->enable)
+			root->control->enable(root, pass);
+	}
+
+	for (c = root; c; c = c->next) {
+		if (root->children)
+			chip_configure(root->children, pass);
 	}
 }

src/include/device/chip.h

@@ -6,6 +6,11 @@
  */
 
 /* some of the types of resources chips can control */
+#ifndef CHIP_CONFIGURE
+#define CHIP_CONFIGURE(chip, pass) chip_configure(chip, pass)
+#else
+#define CHIP_CONFIGURE(chip, pass)
+#endif
 
 struct com_ports {
   unsigned int enable,baud, base, irq;
@@ -24,6 +29,7 @@ struct lpt_ports {
 
 enum chip_pass {
 	CHIP_PRE_CONSOLE,
+	CHIP_PRE_PCI,
 	CHIP_PRE_DEVICE_ENUMERATE,
 	CHIP_PRE_DEVICE_CONFIGURE,
 	CHIP_PRE_DEVICE_ENABLE,
@@ -59,5 +65,5 @@ struct chip {
   void *chip_info; /* the dreaded "void *" */
 };
 
-extern struct chip *root;
+extern struct chip root;
 extern void chip_configure(struct chip *, enum chip_pass);

src/mainboard/motorola/sandpoint/Config.lb

@@ -34,7 +34,7 @@ end
 ##
 southbridge winbond/w83c553 end
 superio NSC/pc97307 
-	register "com1={1} com2={1} floppy=0 lpt=1 keyboard=1 hwmonitor=1"
+	register ".com1={1}, .lpt={0}, .port=SIO_COM1_BASE"
 end
 
 ##