Whatever happened here,... The DEC Tulip is a network card, no bridge of any

kind. Move it to drivers and make the necessary adaptions. Also drop empty
drivers/generic/generic and start cleaning up Makefiles in drivers/

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5710 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/drivers/Kconfig

@@ -17,9 +17,13 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-config DRIVERS_SIL
+config DRIVERS_SIL_3114
 	bool "Silicon Image SIL3114"
 	default n
 	help
 	It sets PCI class to IDE compatible native mode, allowing
 	SeaBIOS, FILO etc... to boot from it.
+
+
+source src/drivers/dec/Kconfig
+

src/drivers/Makefile.inc

@@ -1,5 +1,35 @@
-subdirs-y += generic/debug
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2010 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+subdirs-y += dec
+
+# should these be cleaned up to behave like all other subdirectories?
+
 subdirs-y += ati/ragexl
+subdirs-y += emulation/qemu
+subdirs-y += generic/debug
+subdirs-y += i2c/adm1026
+subdirs-y += i2c/adm1027
+subdirs-y += i2c/adt7463
+subdirs-y += i2c/i2cmux
+subdirs-y += i2c/i2cmux2
+subdirs-y += i2c/lm63
 subdirs-y += sil/3114
-subdirs-y += ti/pcmcia-cardbus
-subdirs-y += dec/21143
+subdirs-y += trident/blade3d
+

src/drivers/dec/21143/21143.c

@@ -0,0 +1,70 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2010 Marc Bertens <mbertens@xs4all.nl>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <device/device.h>
+#include <device/pci_def.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <console/console.h>
+
+/**
+ * The following should be set in the mainboard-specific Kconfig file.
+ */
+#if (!defined(CONFIG_DEC21143_CACHE_LINE_SIZE) || \
+     !defined(CONFIG_DEC21143_EXPANSION_ROM_BASE_ADDRESS) || \
+     !defined(CONFIG_DEC21143_COMMAND_AND_STATUS_CONFIGURATION))
+#error "you must supply these values in your mainboard-specific Kconfig file"
+#endif
+
+/* CONFIG_DEC21143_CACHE_LINE_SIZE try 0x00000000 if unsure */
+/* CONFIG_DEC21143_EXPANSION_ROM_BASE_ADDRESS try 0x00000000 if unsure */
+/* CONFIG_DEC21143_COMMAND_AND_STATUS_CONFIGURATION try 0x02800107 or 0x02800007 if unsure */
+
+/**
+ * This driver take the values from Kconfig and load them in the registers
+ */
+static void dec_21143_enable( device_t dev )
+{
+	printk( BIOS_DEBUG, "Init of DECchip 21143 Kconfig style\n");
+	// Command and Status Configuration Register (Offset 0x04)
+	pci_write_config32( dev, 0x04, CONFIG_DEC21143_COMMAND_AND_STATUS_CONFIGURATION );
+	printk( BIOS_DEBUG, "0x04 = %08x (07 01 80 02)\n", pci_read_config32(dev, 0x04) );
+	// Cache Line Size Register (Offset 0x0C)
+	pci_write_config8( dev, 0x0C, CONFIG_DEC21143_CACHE_LINE_SIZE );
+	printk( BIOS_DEBUG, "0x0c = %08x (00 80 00 00)\n", pci_read_config32(dev, 0x0C) );
+	// Expansion ROM Base Address Register (Offset 0x30)
+	pci_write_config32( dev, 0x30, CONFIG_DEC21143_EXPANSION_ROM_BASE_ADDRESS );
+	printk( BIOS_DEBUG, "0x30 = %08x (0x00000000)\n", pci_read_config32(dev, 0x30) );
+	return;
+}
+
+static struct device_operations dec_21143_ops  = {
+        .read_resources   = pci_dev_read_resources,
+        .set_resources    = pci_dev_set_resources,
+        .enable_resources = pci_dev_enable_resources,
+        .init             = dec_21143_enable,
+        .scan_bus         = 0,
+};
+
+static const struct pci_driver dec_21143_driver __pci_driver = {
+        .ops    = &dec_21143_ops,
+        .vendor = PCI_VENDOR_ID_DEC,
+        .device = PCI_DEVICE_ID_DEC_21142,
+};

src/drivers/dec/21143/Kconfig

@@ -0,0 +1,2 @@
+config DRIVERS_DEC_21143
+	bool

src/drivers/dec/21143/Makefile.inc

@@ -0,0 +1,2 @@
+driver-y += 21143.o
+

src/drivers/dec/Kconfig

@@ -0,0 +1 @@
+source src/drivers/dec/21143/Kconfig

src/drivers/dec/Makefile.inc

@@ -0,0 +1 @@
+subdirs-$(CONFIG_DRIVERS_DEC_21143) += 21143

src/drivers/sil/3114/Makefile.inc

@@ -1 +1 @@
-driver-$(CONFIG_DRIVERS_SIL) += sil_sata.o
+driver-$(CONFIG_DRIVERS_SIL_3114) += sil_sata.o