soc/amd/picasso: add eMMC MMIO device to devicetree
Add the eMMC MMIO device to the devicetree and make it use the common AMD eMMC driver. Since there is now a device for this in the devicetree, also use this device to determine if the FSP should be told if the eMMC controller is supposed to be disabled. TEST=On Mandolin the eMMC controller both disappears in the Windows 10 device manager and in dmesg on Ubuntu 2022.04 LTS TEST=Morphius with NVMe SSD still works Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I5453b69df776d2ce1f3be11e37cd26c8c64f0cd5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/77990 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
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@ -8,10 +8,6 @@ chip soc/amd/picasso
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register "common_config.fadt_boot_arch" = "ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042"
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register "common_config.fadt_flags" = "ACPI_FADT_SLEEP_BUTTON" # See table 5-34 ACPI 6.3 spec
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register "emmc_config" = "{
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.timing = SD_EMMC_DISABLE,
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}"
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register "has_usb2_phy_tune_params" = "1"
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# Controller0 Port0 Default
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@ -8,10 +8,6 @@ chip soc/amd/picasso
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register "common_config.fadt_boot_arch" = "ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042"
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register "common_config.fadt_flags" = "ACPI_FADT_SLEEP_BUTTON" # See table 5-34 ACPI 6.3 spec
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register "emmc_config" = "{
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.timing = SD_EMMC_DISABLE,
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}"
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register "has_usb2_phy_tune_params" = "1"
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# Controller0 Port0 Default
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@ -8,10 +8,6 @@ chip soc/amd/picasso
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register "common_config.fadt_boot_arch" = "ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042"
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register "common_config.fadt_flags" = "ACPI_FADT_SLEEP_BUTTON" # See table 5-34 ACPI 6.3 spec
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register "emmc_config" = "{
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.timing = SD_EMMC_DISABLE,
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}"
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register "has_usb2_phy_tune_params" = "1"
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# Controller0 Port0 Default
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@ -388,4 +388,6 @@ chip soc/amd/picasso
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device ref uart_0 on end # console
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device ref emmc on end
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end # chip soc/amd/picasso
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@ -436,4 +436,6 @@ chip soc/amd/picasso
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device ref uart_0 on end # console
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device ref emmc on end
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end # chip soc/amd/picasso
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@ -4,13 +4,9 @@
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void variant_devtree_update(void)
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{
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struct soc_amd_picasso_config *cfg;
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cfg = config_of_soc();
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/*
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* Enable eMMC if eMMC bit is set in FW_CONFIG or device is unprovisioned.
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*/
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if (!(variant_has_emmc() || boot_is_factory_unprovisioned()))
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cfg->emmc_config.timing = SD_EMMC_DISABLE;
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DEV_PTR(emmc)->enabled = 0;
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}
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@ -59,7 +59,7 @@ void variant_devtree_update(void)
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cfg->emmc_config.timing = SD_EMMC_EMMC_HS200;
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}
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} else {
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cfg->emmc_config.timing = SD_EMMC_DISABLE;
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DEV_PTR(emmc)->enabled = 0;
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}
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update_audio_configuration();
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@ -7,13 +7,9 @@
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void variant_devtree_update(void)
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{
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struct soc_amd_picasso_config *cfg;
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cfg = config_of_soc();
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/*
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* Enable eMMC if eMMC bit is set in FW_CONFIG or device is unprovisioned.
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*/
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if (!(variant_has_emmc() || boot_is_factory_unprovisioned()))
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cfg->emmc_config.timing = SD_EMMC_DISABLE;
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DEV_PTR(emmc)->enabled = 0;
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}
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@ -4,13 +4,9 @@
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void variant_devtree_update(void)
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{
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struct soc_amd_picasso_config *cfg;
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cfg = config_of_soc();
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/*
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* Enable eMMC if eMMC bit is set in FW_CONFIG or device is unprovisioned.
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*/
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if (!(variant_has_emmc() || boot_is_factory_unprovisioned()))
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cfg->emmc_config.timing = SD_EMMC_DISABLE;
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DEV_PTR(emmc)->enabled = 0;
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}
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@ -37,6 +37,7 @@ config SOC_AMD_PICASSO
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select SOC_AMD_COMMON_BLOCK_DATA_FABRIC
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select SOC_AMD_COMMON_BLOCK_DATA_FABRIC_DOMAIN
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select SOC_AMD_COMMON_BLOCK_DATA_FABRIC_NP_REGION
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select SOC_AMD_COMMON_BLOCK_EMMC
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select SOC_AMD_COMMON_BLOCK_GRAPHICS
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select SOC_AMD_COMMON_BLOCK_HAS_ESPI
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select SOC_AMD_COMMON_BLOCK_HDA
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@ -87,9 +87,10 @@ Device (MMC0)
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}
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}
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Name (STAT, 0x0)
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Method (_STA, 0x0, NotSerialized)
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{
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Return (0x0F)
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Return (STAT)
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}
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}
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@ -177,6 +177,9 @@ struct soc_amd_picasso_config {
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* HS400 -> NONE (0x05)
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*
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* The kernel driver uses a heuristic to determine if HS400 is supported.
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*
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* If the eMMC MMIO device is disabled in the devicetree,
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* fsps_update_emmc_config will set timing to SD_EMMC_DISABLE.
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*/
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enum {
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SD_EMMC_DISABLE,
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@ -57,4 +57,5 @@ chip soc/amd/picasso
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device mmio 0xfedca000 alias uart_1 off ops amd_uart_mmio_ops end
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device mmio 0xfedce000 alias uart_2 off ops amd_uart_mmio_ops end
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device mmio 0xfedcf000 alias uart_3 off ops amd_uart_mmio_ops end
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device mmio 0xfedd5000 alias emmc off ops amd_emmc_mmio_ops end
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end
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@ -56,6 +56,11 @@ static void fsps_update_emmc_config(FSP_S_CONFIG *scfg,
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break;
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}
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/* Make sure that the FSP knows that the EMMC controller should be disabled when the
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corresponding MMIO device is disabled */
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if (!DEV_PTR(emmc)->enabled)
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val = SD_DISABLE;
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scfg->emmc0_mode = val;
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scfg->emmc0_sdr104_hs400_driver_strength =
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cfg->emmc_config.sdr104_hs400_driver_strength;
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