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Enable UART

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This commit is contained in:
Jeremy Soller
2019-10-30 12:08:01 -06:00
parent 36f788c558
commit 852283919e
2 changed files with 5 additions and 5 deletions
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8
src/mainboard/system76/cml-u/Kconfig
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@@ -12,6 +12,7 @@ config BOARD_SPECIFIC_OPTIONS
select HAVE_OPTION_TABLE select HAVE_OPTION_TABLE
select HAVE_SMI_HANDLER select HAVE_SMI_HANDLER
select INTEL_GMA_HAVE_VBT select INTEL_GMA_HAVE_VBT
select INTEL_LPSS_UART_FOR_CONSOLE
# select MAINBOARD_HAS_SPI_TPM_CR50 # select MAINBOARD_HAS_SPI_TPM_CR50
# select MAINBOARD_HAS_TPM2 # select MAINBOARD_HAS_TPM2
select NO_UART_ON_SUPERIO select NO_UART_ON_SUPERIO
@@ -62,10 +63,9 @@ config ONBOARD_VGA_IS_PRIMARY
bool bool
default y default y
# This causes UEFI to hang config UART_FOR_CONSOLE
#config UART_FOR_CONSOLE int
# int default 2
# default 2
config MAX_CPUS config MAX_CPUS
int int

2
src/mainboard/system76/cml-u/devicetree.cb
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@@ -208,7 +208,7 @@ chip soc/intel/cannonlake
device pci 17.0 on end # SATA device pci 17.0 on end # SATA
device pci 19.0 off end # I2C #4 device pci 19.0 off end # I2C #4
device pci 19.1 off end # I2C #5 device pci 19.1 off end # I2C #5
device pci 19.2 off end # UART #2 device pci 19.2 on end # UART #2
device pci 1a.0 off end # eMMC device pci 1a.0 off end # eMMC
device pci 1c.0 on end # PCI Express Port 1 device pci 1c.0 on end # PCI Express Port 1
device pci 1c.1 off end # PCI Express Port 2 device pci 1c.1 off end # PCI Express Port 2