device/mmio.h: Move readXp/writeXp helpers to device/mmio.h

These helpers are not architecture dependent and it might be used for
different platform.

Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: Ic13a94d91affb7cf65a2f22f08ea39ed671bc8e8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62561
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/acpi/acpi.c

@@ -13,22 +13,22 @@
  * in coreboot.
  */
 
-#include <console/console.h>
-#include <string.h>
 #include <acpi/acpi.h>
 #include <acpi/acpi_ivrs.h>
 #include <acpi/acpigen.h>
 #include <arch/hpet.h>
-#include <arch/mmio.h>
+#include <cbfs.h>
-#include <device/pci.h>
 #include <cbmem.h>
 #include <commonlib/helpers.h>
+#include <commonlib/sort.h>
+#include <console/console.h>
 #include <cpu/cpu.h>
-#include <cbfs.h>
+#include <device/mmio.h>
+#include <device/pci.h>
+#include <pc80/mc146818rtc.h>
+#include <string.h>
 #include <types.h>
 #include <version.h>
-#include <commonlib/sort.h>
-#include <pc80/mc146818rtc.h>
 
 static acpi_rsdp_t *valid_rsdp(acpi_rsdp_t *rsdp);
 

src/arch/arm/include/armv4/arch/mmio.h

@@ -24,6 +24,9 @@ static inline uint32_t read32(const void *addr)
 	return *(volatile uint32_t *)addr;
 }
 
+/* Not supported */
+uint64_t read64(const void *addr);
+
 static inline void write8(void *addr, uint8_t val)
 {
 	*(volatile uint8_t *)addr = val;
@@ -39,4 +42,7 @@ static inline void write32(void *addr, uint32_t val)
 	*(volatile uint32_t *)addr = val;
 }
 
+/* Not supported */
+void write64(void *addr, uint64_t val);
+
 #endif /* __ARCH_MMIO_H__ */

src/arch/arm/include/armv7/arch/mmio.h

@@ -29,6 +29,9 @@ static inline uint32_t read32(const void *addr)
 	return *(volatile uint32_t *)__builtin_assume_aligned(addr, sizeof(uint32_t));
 }
 
+/* Not supported */
+uint64_t read64(const void *addr);
+
 static inline void write8(void *addr, uint8_t val)
 {
 	dmb();
@@ -50,4 +53,7 @@ static inline void write32(void *addr, uint32_t val)
 	dmb();
 }
 
+/* Not supported */
+void write64(void *addr, uint64_t val);
+
 #endif /* __ARCH_MMIO_H__ */

src/arch/x86/include/arch/mmio.h

@@ -45,44 +45,4 @@ static __always_inline void write64(volatile void *addr, uint64_t value)
 	*((volatile uint64_t *)(addr)) = value;
 }
 
-static __always_inline uint8_t read8p(const uintptr_t addr)
-{
-	return read8((void *)addr);
-}
-
-static __always_inline uint16_t read16p(const uintptr_t addr)
-{
-	return read16((void *)addr);
-}
-
-static __always_inline uint32_t read32p(const uintptr_t addr)
-{
-	return read32((void *)addr);
-}
-
-static __always_inline uint64_t read64p(const uintptr_t addr)
-{
-	return read64((void *)addr);
-}
-
-static __always_inline void write8p(const uintptr_t addr, const uint8_t value)
-{
-	write8((void *)addr, value);
-}
-
-static __always_inline void write16p(const uintptr_t addr, const uint16_t value)
-{
-	write16((void *)addr, value);
-}
-
-static __always_inline void write32p(const uintptr_t addr, const uint32_t value)
-{
-	write32((void *)addr, value);
-}
-
-static __always_inline void write64p(const uintptr_t addr, const uint64_t value)
-{
-	write64((void *)addr, value);
-}
-
 #endif /* __ARCH_MMIO_H__ */

src/include/device/mmio.h

@@ -207,4 +207,44 @@ static inline void buffer_to_fifo32(const void *buffer, size_t size, void *fifo,
 #define READ32_BITFIELD(addr, name) \
 	EXTRACT_BITFIELD(read32(addr), name)
 
+static __always_inline uint8_t read8p(const uintptr_t addr)
+{
+	return read8((void *)addr);
+}
+
+static __always_inline uint16_t read16p(const uintptr_t addr)
+{
+	return read16((void *)addr);
+}
+
+static __always_inline uint32_t read32p(const uintptr_t addr)
+{
+	return read32((void *)addr);
+}
+
+static __always_inline uint64_t read64p(const uintptr_t addr)
+{
+	return read64((void *)addr);
+}
+
+static __always_inline void write8p(const uintptr_t addr, const uint8_t value)
+{
+	write8((void *)addr, value);
+}
+
+static __always_inline void write16p(const uintptr_t addr, const uint16_t value)
+{
+	write16((void *)addr, value);
+}
+
+static __always_inline void write32p(const uintptr_t addr, const uint32_t value)
+{
+	write32((void *)addr, value);
+}
+
+static __always_inline void write64p(const uintptr_t addr, const uint64_t value)
+{
+	write64((void *)addr, value);
+}
+
 #endif	/* __DEVICE_MMIO_H__ */

src/security/intel/cbnt/logging.c

@@ -1,9 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <arch/mmio.h>
 #include <console/console.h>
 #include <cpu/x86/msr.h>
 #include <cpu/intel/msr.h>
+#include <device/mmio.h>
 #include <stdint.h>
 #include <security/intel/txt/txt.h>
 

src/soc/intel/common/block/smm/smihandler.c

@@ -2,8 +2,6 @@
 
 #include <arch/hlt.h>
 #include <arch/io.h>
-#include <arch/mmio.h>
-#include <device/pci_ops.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/msr.h>
@@ -12,7 +10,9 @@
 #include <cpu/intel/em64t101_save_state.h>
 #include <cpu/intel/msr.h>
 #include <delay.h>
+#include <device/mmio.h>
 #include <device/pci_def.h>
+#include <device/pci_ops.h>
 #include <elog.h>
 #include <intelblocks/fast_spi.h>
 #include <intelblocks/pmclib.h>