soc/intel/alderlake: Add Twinlake graphics device IDs

Add the graphics device IDs for Twinlake platform based on
Platform External Design Specification.

Document ID: 645548

BUG=b:326901448
TEST=Build tivviks and verify the IGD IDs.

Change-Id: Ide008d5c5302bd589784bc917a2610c42a0fdee4
Signed-off-by: Sowmya V <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82038
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>

src/include/device/pci_ids.h

@@ -4147,6 +4147,8 @@
 #define PCI_DID_INTEL_RPL_U_GT4				0xa7ac
 #define PCI_DID_INTEL_RPL_U_GT5				0xa7ad
 #define PCI_DID_INTEL_LNL_M_GT2				0x64a0
+#define PCI_DID_INTEL_TWL_GT1_1				0x46D3
+#define PCI_DID_INTEL_TWL_GT1_2				0x46D4
 
 /* Intel Northbridge Ids */
 #define PCI_DID_INTEL_APL_NB			0x5af0

src/soc/intel/alderlake/bootblock/report_platform.c

@@ -236,7 +236,9 @@ static struct {
 	{ PCI_DID_INTEL_RPL_S_GT0, "Raptorlake S GT0" },
 	{ PCI_DID_INTEL_RPL_S_GT1_1, "Raptorlake S GT1" },
 	{ PCI_DID_INTEL_RPL_S_GT1_2, "Raptorlake S GT1" },
-	{ PCI_DID_INTEL_RPL_S_GT1_3, "Raptorlake S GT1" }
+	{ PCI_DID_INTEL_RPL_S_GT1_3, "Raptorlake S GT1" },
+	{ PCI_DID_INTEL_TWL_GT1_1, "Twinlake GT1" },
+	{ PCI_DID_INTEL_TWL_GT1_2, "Twinlake GT1" },
 };
 
 static inline uint8_t get_dev_revision(pci_devfn_t dev)

src/soc/intel/common/block/graphics/graphics.c

@@ -456,6 +456,8 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DID_INTEL_RPL_HX_GT2,
 	PCI_DID_INTEL_RPL_HX_GT3,
 	PCI_DID_INTEL_RPL_HX_GT4,
+	PCI_DID_INTEL_TWL_GT1_1,
+	PCI_DID_INTEL_TWL_GT1_2,
 	0,
 };