drop one more version of doing serial uart output differently.
coreboot made it kind of complicated to print a character on serial. Not quite as complicated as UEFI, but too much for a good design. Fix it. Signed-off-by: Stefan Reinauer <stepan@coreboot.org> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6191 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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committed by
Stefan Reinauer
parent
efbfd501fe
commit
85b0fa1ace
@@ -1,28 +1,36 @@
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/* Should support 8250, 16450, 16550, 16550A type uarts */
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2003 Eric Biederman
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* Copyright (C) 2006-2010 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <uart8250.h>
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#include <pc80/mc146818rtc.h>
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#if CONFIG_USE_OPTION_TABLE
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#include "option_table.h"
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#endif
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/* Data */
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#define UART_RBR 0x00
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#define UART_TBR 0x00
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/* Control */
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#define UART_IER 0x01
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#define UART_IIR 0x02
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#define UART_FCR 0x02
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#define UART_LCR 0x03
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#define UART_MCR 0x04
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#define UART_DLL 0x00
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#define UART_DLM 0x01
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/* Status */
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#define UART_LSR 0x05
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#define UART_MSR 0x06
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#define UART_SCR 0x07
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/* Should support 8250, 16450, 16550, 16550A type UARTs */
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static inline int uart8250_can_tx_byte(unsigned base_port)
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{
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return inb(base_port + UART_LSR) & 0x20;
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return inb(base_port + UART_LSR) & UART_MSR_DSR;
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}
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static inline void uart8250_wait_to_tx_byte(unsigned base_port)
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@@ -33,7 +41,7 @@ static inline void uart8250_wait_to_tx_byte(unsigned base_port)
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static inline void uart8250_wait_until_sent(unsigned base_port)
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{
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while(!(inb(base_port + UART_LSR) & 0x40))
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while(!(inb(base_port + UART_LSR) & UART_LSR_TEMT))
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;
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}
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@@ -47,7 +55,7 @@ void uart8250_tx_byte(unsigned base_port, unsigned char data)
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int uart8250_can_rx_byte(unsigned base_port)
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{
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return inb(base_port + UART_LSR) & 0x01;
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return inb(base_port + UART_LSR) & UART_LSR_DR;
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}
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unsigned char uart8250_rx_byte(unsigned base_port)
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@@ -57,34 +65,56 @@ unsigned char uart8250_rx_byte(unsigned base_port)
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return inb(base_port + UART_RBR);
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}
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void uart8250_init(unsigned base_port, unsigned divisor, unsigned lcs)
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void uart8250_init(unsigned base_port, unsigned divisor)
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{
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lcs &= 0x7f;
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/* disable interrupts */
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/* Disable interrupts */
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outb(0x0, base_port + UART_IER);
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/* enable fifo's */
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outb(0x01, base_port + UART_FCR);
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/* Enable FIFOs */
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outb(UART_FCR_FIFO_EN, base_port + UART_FCR);
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/* assert DTR and RTS so the other end is happy */
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outb(0x03, base_port + UART_MCR);
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/* Set Baud Rate Divisor to 12 ==> 115200 Baud */
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outb(0x80 | lcs, base_port + UART_LCR);
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outb(UART_MCR_DTR | UART_MCR_RTS, base_port + UART_MCR);
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/* DLAB on */
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outb(UART_LCR_DLAB | CONFIG_TTYS0_LCS, base_port + UART_LCR);
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/* Set Baud Rate Divisor. 12 ==> 115200 Baud */
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outb(divisor & 0xFF, base_port + UART_DLL);
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outb((divisor >> 8) & 0xFF, base_port + UART_DLM);
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outb(lcs, base_port + UART_LCR);
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/* Set to 3 for 8N1 */
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outb(CONFIG_TTYS0_LCS, base_port + UART_LCR);
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}
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#ifndef __ROMCC__
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/* Initialize a generic uart */
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void init_uart8250(unsigned base_port, struct uart8250 *uart)
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{
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int divisor;
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int lcs;
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divisor = 115200/(uart->baud ? uart->baud: 1);
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lcs = 3;
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int divisor = uart->baud ? (115200/uart->baud) : 1;
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if (base_port == CONFIG_TTYS0_BASE) {
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/* Don't reinitialize the console serial port,
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* This is espeically nasty in SMP.
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* NOTE: The first invocation thus always needs to be
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*/
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return;
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}
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uart8250_init(base_port, divisor, lcs);
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uart8250_init(base_port, divisor);
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}
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#endif
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void uart_init(void)
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{
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#if CONFIG_USE_OPTION_TABLE
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static const unsigned char divisor[] = { 1, 2, 3, 6, 12, 24, 48, 96 };
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unsigned ttys0_div, ttys0_index;
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ttys0_index = read_option(CMOS_VSTART_baud_rate, CMOS_VLEN_baud_rate, 0);
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ttys0_index &= 7;
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ttys0_div = divisor[ttys0_index];
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uart8250_init(CONFIG_TTYS0_BASE, ttys0_div);
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#else
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uart8250_init(CONFIG_TTYS0_BASE, CONFIG_TTYS0_DIV);
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#endif
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}
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