cpu/mtrr.h: Fix macro names for MTRR registers
We use UNDERSCORE_CASE. For the MTRR macros that refer to an MSR, we also remove the _MSR suffix, as they are, by definition, MSRs. Change-Id: Id4483a75d62cf1b478a9105ee98a8f55140ce0ef Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/11761 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
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@@ -2,49 +2,46 @@
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#define CPU_X86_MTRR_H
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/* These are the region types */
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#define MTRR_TYPE_UNCACHEABLE 0
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#define MTRR_TYPE_WRCOMB 1
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/*#define MTRR_TYPE_ 2*/
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/*#define MTRR_TYPE_ 3*/
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#define MTRR_TYPE_WRTHROUGH 4
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#define MTRR_TYPE_WRPROT 5
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#define MTRR_TYPE_WRBACK 6
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#define MTRR_NUM_TYPES 7
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#define MTRR_TYPE_UNCACHEABLE 0
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#define MTRR_TYPE_WRCOMB 1
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#define MTRR_TYPE_WRTHROUGH 4
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#define MTRR_TYPE_WRPROT 5
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#define MTRR_TYPE_WRBACK 6
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#define MTRR_NUM_TYPES 7
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#define MTRRcap_MSR 0x0fe
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#define MTRR_CAP_MSR 0x0fe
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#define MTRRcapSmrr (1 << 11)
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#define MTRRcapWc (1 << 10)
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#define MTRRcapFix (1 << 8)
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#define MTRRcapVcnt 0xff
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#define MTRR_CAP_SMRR (1 << 11)
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#define MTRR_CAP_WC (1 << 10)
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#define MTRR_CAP_FIX (1 << 8)
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#define MTRR_CAP_VCNT 0xff
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#define MTRRdefType_MSR 0x2ff
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#define MTRR_DEF_TYPE_MSR 0x2ff
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#define MTRR_DEF_TYPE_MASK 0xff
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#define MTRR_DEF_TYPE_EN (1 << 11)
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#define MTRR_DEF_TYPE_FIX_EN (1 << 10)
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#define MTRRdefTypeEn (1 << 11)
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#define MTRRdefTypeFixEn (1 << 10)
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#define MTRRdefTypeType 0xff
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#define SMRRphysBase_MSR 0x1f2
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#define SMRRphysMask_MSR 0x1f3
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#define SMRR_PHYS_BASE 0x1f2
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#define SMRR_PHYS_MASK 0x1f3
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#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
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#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
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#define MTRR_PHYS_BASE(reg) (0x200 + 2 * (reg))
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#define MTRR_PHYS_MASK(reg) (MTRR_PHYS_BASE(reg) + 1)
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#define MTRR_PHYS_MASK_VALID (1 << 11)
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#define MTRRphysMaskValid (1 << 11)
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#define NUM_FIXED_RANGES 88
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#define RANGES_PER_FIXED_MTRR 8
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#define MTRRfix64K_00000_MSR 0x250
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#define MTRRfix16K_80000_MSR 0x258
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#define MTRRfix16K_A0000_MSR 0x259
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#define MTRRfix4K_C0000_MSR 0x268
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#define MTRRfix4K_C8000_MSR 0x269
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#define MTRRfix4K_D0000_MSR 0x26a
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#define MTRRfix4K_D8000_MSR 0x26b
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#define MTRRfix4K_E0000_MSR 0x26c
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#define MTRRfix4K_E8000_MSR 0x26d
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#define MTRRfix4K_F0000_MSR 0x26e
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#define MTRRfix4K_F8000_MSR 0x26f
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#define NUM_FIXED_RANGES 88
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#define RANGES_PER_FIXED_MTRR 8
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#define MTRR_FIX_64K_00000 0x250
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#define MTRR_FIX_16K_80000 0x258
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#define MTRR_FIX_16K_A0000 0x259
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#define MTRR_FIX_4K_C0000 0x268
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#define MTRR_FIX_4K_C8000 0x269
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#define MTRR_FIX_4K_D0000 0x26a
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#define MTRR_FIX_4K_D8000 0x26b
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#define MTRR_FIX_4K_E0000 0x26c
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#define MTRR_FIX_4K_E8000 0x26d
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#define MTRR_FIX_4K_F0000 0x26e
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#define MTRR_FIX_4K_F8000 0x26f
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#if !defined (__ASSEMBLER__) && !defined(__PRE_RAM__)
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