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- First pass at code for generic link width and size determination

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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@999 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Eric Biederman
2003-07-21 23:30:29 +00:00
parent 2c018fba95
commit 860ad373ef
4 changed files with 198 additions and 33 deletions
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13
src/include/device/pci_def.h
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@@ -182,7 +182,18 @@
#define PCI_CAP_ID_HT 0x08
#define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */
#define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */
#define PCI_CAP_SIZEOF 4
/* Hypertransport Registers */
#define PCI_HT_CAP_SIZEOF 4
#define PCI_HT_CAP_HOST_WIDTH 6 /* width value & capability */
#define PCI_HT_CAP_HOST_FREQ 0x09 /* Host frequency */
#define PCI_HT_CAP_HOST_FREQ_CAP 0x0a /* Host Frequency capability */
#define PCI_HT_CAP_SLAVE_WIDTH0 6 /* width value & capability */
#define PCI_HT_CAP_SLAVE_WIDTH1 0x0a /* width value & capability to */
#define PCI_HT_CAP_SLAVE_FREQ0 0x0d /* Slave frequency from */
#define PCI_HT_CAP_SLAVE_FREQ1 0x011 /* Slave frequency to */
#define PCI_HT_CAP_SLAVE_FREQ_CAP0 0x0e /* Frequency capability from */
#define PCI_HT_CAP_SLAVE_FREQ_CAP1 0x12 /* Frequency capability to */
/* Power Management Registers */