From 8641479e7226769264c7ea61f3eac67b5bec420d Mon Sep 17 00:00:00 2001 From: Jeremy Soller Date: Fri, 3 Mar 2023 09:16:57 -0700 Subject: [PATCH] rpl: add one TBT port to devicetree Change-Id: I0b15f9161f576970ef9feeab7ba7ffdb27070505 --- src/mainboard/system76/rpl/Kconfig | 3 +-- src/mainboard/system76/rpl/devicetree.cb | 6 +++++- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/src/mainboard/system76/rpl/Kconfig b/src/mainboard/system76/rpl/Kconfig index 6bb8535db4..bf34824b24 100644 --- a/src/mainboard/system76/rpl/Kconfig +++ b/src/mainboard/system76/rpl/Kconfig @@ -16,9 +16,8 @@ config BOARD_SYSTEM76_RPL_COMMON select NO_UART_ON_SUPERIO select PCIEXP_SUPPORT_RESIZABLE_BARS select SOC_INTEL_ALDERLAKE_S3 + select SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT select SOC_INTEL_COMMON_BLOCK_HDA_VERB - select SOC_INTEL_COMMON_BLOCK_TCSS - select SOC_INTEL_COMMON_BLOCK_USB4 select SOC_INTEL_CRASHLOG select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES select SOC_INTEL_RAPTORLAKE diff --git a/src/mainboard/system76/rpl/devicetree.cb b/src/mainboard/system76/rpl/devicetree.cb index 2f6e15b852..ac838ad38f 100644 --- a/src/mainboard/system76/rpl/devicetree.cb +++ b/src/mainboard/system76/rpl/devicetree.cb @@ -33,7 +33,11 @@ chip soc/intel/alderlake register "gfx" = "GMA_DEFAULT_PANEL(0)" end - #TODO device ref tbt_pcie_rp0 on end + device ref tbt_pcie_rp0 on end + device ref tcss_xhci on + register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)" + end + device ref tcss_dma0 on end device ref shared_sram on end device ref cnvi_wifi on register "cnvi_bt_core" = "true"